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-rw-r--r--src/mainboard/intel/littleplains/Kconfig10
-rw-r--r--src/mainboard/intel/littleplains/config_seabios5
2 files changed, 8 insertions, 7 deletions
diff --git a/src/mainboard/intel/littleplains/Kconfig b/src/mainboard/intel/littleplains/Kconfig
index 2fc5cb1934..bde944c4b5 100644
--- a/src/mainboard/intel/littleplains/Kconfig
+++ b/src/mainboard/intel/littleplains/Kconfig
@@ -58,16 +58,12 @@ config UART_FOR_CONSOLE
help
The Little Plains board uses COM2 (2f8) for the serial console.
-config SEABIOS_MALLOC_UPPERMEMORY
- bool
- default n
+config PAYLOAD_CONFIGFILE
+ string
+ default "$(top)/src/mainboard/$(MAINBOARDDIR)/config_seabios"
help
The Avoton/Rangeley chip does not allow devices to write into the 0xe000
segment. This means that USB/SATA devices will not work in SeaBIOS unless
we put the SeaBIOS buffer area down in the 0x9000 segment.
-config CPU_MICROCODE_CBFS_LOC
- hex
- default 0xfff60040
-
endif # BOARD_INTEL_LITTLEPLAINS
diff --git a/src/mainboard/intel/littleplains/config_seabios b/src/mainboard/intel/littleplains/config_seabios
new file mode 100644
index 0000000000..f688f2b530
--- /dev/null
+++ b/src/mainboard/intel/littleplains/config_seabios
@@ -0,0 +1,5 @@
+# The Avoton/Rangeley chip does not allow devices to write into the 0xe000
+# segment. This means that USB/SATA devices will not work in SeaBIOS unless
+# we put the SeaBIOS buffer area down in the 0x9000 segment.
+
+# CONFIG_MALLOC_UPPERMEMORY is not set