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-rw-r--r--src/mainboard/google/reef/romstage.c2
-rw-r--r--src/soc/intel/apollolake/include/soc/meminit.h1
-rw-r--r--src/soc/intel/apollolake/meminit.c2
3 files changed, 5 insertions, 0 deletions
diff --git a/src/mainboard/google/reef/romstage.c b/src/mainboard/google/reef/romstage.c
index e8d8e1675e..964dee42cf 100644
--- a/src/mainboard/google/reef/romstage.c
+++ b/src/mainboard/google/reef/romstage.c
@@ -103,6 +103,7 @@ static const struct lpddr4_sku skus[] = {
.ch0_dual_rank = 1,
.ch1_dual_rank = 1,
.part_num = "MT53B512M32D2NP",
+ .disable_periodic_retraining = 1,
},
/* MT53B256M32D1NP-062 WT:C - both logical channels */
[3] = {
@@ -110,6 +111,7 @@ static const struct lpddr4_sku skus[] = {
.ch0_rank_density = LP4_8Gb_DENSITY,
.ch1_rank_density = LP4_8Gb_DENSITY,
.part_num = "MT53B256M32D1NP",
+ .disable_periodic_retraining = 1,
},
/* K4F8E304HB-MGCH - both logical channels */
[PROTO_SKU] = {
diff --git a/src/soc/intel/apollolake/include/soc/meminit.h b/src/soc/intel/apollolake/include/soc/meminit.h
index c115c4ae23..06d2b58193 100644
--- a/src/soc/intel/apollolake/include/soc/meminit.h
+++ b/src/soc/intel/apollolake/include/soc/meminit.h
@@ -102,6 +102,7 @@ struct lpddr4_sku {
int ch0_dual_rank;
int ch1_dual_rank;
const char *part_num;
+ bool disable_periodic_retraining;
};
struct lpddr4_cfg {
diff --git a/src/soc/intel/apollolake/meminit.c b/src/soc/intel/apollolake/meminit.c
index 03e9ac485b..d0e76836bb 100644
--- a/src/soc/intel/apollolake/meminit.c
+++ b/src/soc/intel/apollolake/meminit.c
@@ -254,6 +254,8 @@ void meminit_lpddr4_by_sku(struct FSP_M_CONFIG *cfg,
sku->ch1_dual_rank,
lpcfg->swizzle_config);
}
+
+ cfg->PeriodicRetrainingDisable = sku->disable_periodic_retraining;
}
void save_lpddr4_dimm_info(const struct lpddr4_cfg *lp4cfg, size_t mem_sku)