summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--src/soc/amd/picasso/Makefile.inc4
-rw-r--r--src/soc/amd/picasso/aoac.c97
-rw-r--r--src/soc/amd/picasso/include/soc/southbridge.h3
-rw-r--r--src/soc/amd/picasso/southbridge.c81
4 files changed, 104 insertions, 81 deletions
diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc
index 7fce124a5d..7b80b21c78 100644
--- a/src/soc/amd/picasso/Makefile.inc
+++ b/src/soc/amd/picasso/Makefile.inc
@@ -12,6 +12,7 @@ subdirs-y += ../../../cpu/x86/smm
bootblock-y += bootblock/pre_c.S
bootblock-y += bootblock/bootblock.c
+bootblock-y += aoac.c
bootblock-y += southbridge.c
bootblock-y += i2c.c
bootblock-$(CONFIG_PICASSO_UART) += uart.c
@@ -27,6 +28,7 @@ romstage-y += pmutil.c
romstage-y += memmap.c
romstage-$(CONFIG_PICASSO_UART) += uart.c
romstage-y += tsc_freq.c
+romstage-y += aoac.c
romstage-y += southbridge.c
romstage-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c
romstage-y += psp.c
@@ -37,6 +39,7 @@ verstage-y += gpio.c
verstage-y += i2c.c
verstage-y += pmutil.c
verstage-y += config.c
+verstage-y += aoac.c
verstage-$(CONFIG_PICASSO_UART) += uart.c
verstage-y += tsc_freq.c
@@ -49,6 +52,7 @@ ramstage-y += mca.c
ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c
ramstage-$(CONFIG_HAVE_ACPI_TABLES) += agesa_acpi.c
ramstage-y += gpio.c
+ramstage-y += aoac.c
ramstage-y += southbridge.c
ramstage-y += pmutil.c
ramstage-y += acp.c
diff --git a/src/soc/amd/picasso/aoac.c b/src/soc/amd/picasso/aoac.c
new file mode 100644
index 0000000000..35adc24723
--- /dev/null
+++ b/src/soc/amd/picasso/aoac.c
@@ -0,0 +1,97 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <stdint.h>
+#include <amdblocks/acpimmio.h>
+#include <soc/southbridge.h>
+#include <delay.h>
+
+#define FCH_AOAC_UART_FOR_CONSOLE \
+ (CONFIG_UART_FOR_CONSOLE == 0 ? FCH_AOAC_DEV_UART0 \
+ : CONFIG_UART_FOR_CONSOLE == 1 ? FCH_AOAC_DEV_UART1 \
+ : CONFIG_UART_FOR_CONSOLE == 2 ? FCH_AOAC_DEV_UART2 \
+ : CONFIG_UART_FOR_CONSOLE == 3 ? FCH_AOAC_DEV_UART3 \
+ : -1)
+#if FCH_AOAC_UART_FOR_CONSOLE == -1
+# error Unsupported UART_FOR_CONSOLE chosen
+#endif
+
+/*
+ * Table of devices that need their AOAC registers enabled and waited
+ * upon (usually about .55 milliseconds). Instead of individual delays
+ * waiting for each device to become available, a single delay will be
+ * executed. The console UART is handled separately from this table.
+ */
+const static int aoac_devs[] = {
+ FCH_AOAC_DEV_AMBA,
+ FCH_AOAC_DEV_I2C2,
+ FCH_AOAC_DEV_I2C3,
+ FCH_AOAC_DEV_I2C4,
+ FCH_AOAC_DEV_ESPI,
+};
+
+void power_on_aoac_device(int dev)
+{
+ uint8_t byte;
+
+ /* Power on the UART and AMBA devices */
+ byte = aoac_read8(AOAC_DEV_D3_CTL(dev));
+ byte |= FCH_AOAC_PWR_ON_DEV;
+ aoac_write8(AOAC_DEV_D3_CTL(dev), byte);
+}
+
+void power_off_aoac_device(int dev)
+{
+ uint8_t byte;
+
+ /* Power on the UART and AMBA devices */
+ byte = aoac_read8(AOAC_DEV_D3_CTL(dev));
+ byte &= ~FCH_AOAC_PWR_ON_DEV;
+ aoac_write8(AOAC_DEV_D3_CTL(dev), byte);
+}
+
+bool is_aoac_device_enabled(int dev)
+{
+ uint8_t byte;
+
+ byte = aoac_read8(AOAC_DEV_D3_STATE(dev));
+ byte &= (FCH_AOAC_PWR_RST_STATE | FCH_AOAC_RST_CLK_OK_STATE);
+ if (byte == (FCH_AOAC_PWR_RST_STATE | FCH_AOAC_RST_CLK_OK_STATE))
+ return true;
+ else
+ return false;
+}
+
+static void enable_aoac_console_uart(void)
+{
+ if (!CONFIG(PICASSO_UART))
+ return;
+
+ power_on_aoac_device(FCH_AOAC_UART_FOR_CONSOLE);
+}
+
+static bool is_aoac_console_uart_enabled(void)
+{
+ if (!CONFIG(PICASSO_UART))
+ return true;
+
+ return is_aoac_device_enabled(FCH_AOAC_UART_FOR_CONSOLE);
+}
+
+void enable_aoac_devices(void)
+{
+ bool status;
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(aoac_devs); i++)
+ power_on_aoac_device(aoac_devs[i]);
+ enable_aoac_console_uart();
+
+ /* Wait for AOAC devices to indicate power and clock OK */
+ do {
+ udelay(100);
+ status = true;
+ for (i = 0; i < ARRAY_SIZE(aoac_devs); i++)
+ status &= is_aoac_device_enabled(aoac_devs[i]);
+ status &= is_aoac_console_uart_enabled();
+ } while (!status);
+}
diff --git a/src/soc/amd/picasso/include/soc/southbridge.h b/src/soc/amd/picasso/include/soc/southbridge.h
index 63c9876fce..463ca296aa 100644
--- a/src/soc/amd/picasso/include/soc/southbridge.h
+++ b/src/soc/amd/picasso/include/soc/southbridge.h
@@ -273,6 +273,9 @@ struct soc_power_reg {
};
void enable_aoac_devices(void);
+bool is_aoac_device_enabled(int dev);
+void power_on_aoac_device(int dev);
+void power_off_aoac_device(int dev);
void sb_clk_output_48Mhz(void);
void sb_enable(struct device *dev);
void southbridge_final(void *chip_info);
diff --git a/src/soc/amd/picasso/southbridge.c b/src/soc/amd/picasso/southbridge.c
index d2904d894b..54128abe5d 100644
--- a/src/soc/amd/picasso/southbridge.c
+++ b/src/soc/amd/picasso/southbridge.c
@@ -28,30 +28,6 @@
#include <types.h>
#include "chip.h"
-#define FCH_AOAC_UART_FOR_CONSOLE \
- (CONFIG_UART_FOR_CONSOLE == 0 ? FCH_AOAC_DEV_UART0 \
- : CONFIG_UART_FOR_CONSOLE == 1 ? FCH_AOAC_DEV_UART1 \
- : CONFIG_UART_FOR_CONSOLE == 2 ? FCH_AOAC_DEV_UART2 \
- : CONFIG_UART_FOR_CONSOLE == 3 ? FCH_AOAC_DEV_UART3 \
- : -1)
-#if FCH_AOAC_UART_FOR_CONSOLE == -1
-# error Unsupported UART_FOR_CONSOLE chosen
-#endif
-
-/*
- * Table of devices that need their AOAC registers enabled and waited
- * upon (usually about .55 milliseconds). Instead of individual delays
- * waiting for each device to become available, a single delay will be
- * executed. The console UART is handled separately from this table.
- */
-const static int aoac_devs[] = {
- FCH_AOAC_DEV_AMBA,
- FCH_AOAC_DEV_I2C2,
- FCH_AOAC_DEV_I2C3,
- FCH_AOAC_DEV_I2C4,
- FCH_AOAC_DEV_ESPI,
-};
-
/*
* Table of APIC register index and associated IRQ name. Using IDX_XXX_NAME
* provides a visible association with the index, therefore helping
@@ -111,63 +87,6 @@ const struct irq_idx_name *sb_get_apic_reg_association(size_t *size)
return irq_association;
}
-static void power_on_aoac_device(int dev)
-{
- uint8_t byte;
-
- /* Power on the UART and AMBA devices */
- byte = aoac_read8(AOAC_DEV_D3_CTL(dev));
- byte |= FCH_AOAC_PWR_ON_DEV;
- aoac_write8(AOAC_DEV_D3_CTL(dev), byte);
-}
-
-static bool is_aoac_device_enabled(int dev)
-{
- uint8_t byte;
-
- byte = aoac_read8(AOAC_DEV_D3_STATE(dev));
- byte &= (FCH_AOAC_PWR_RST_STATE | FCH_AOAC_RST_CLK_OK_STATE);
- if (byte == (FCH_AOAC_PWR_RST_STATE | FCH_AOAC_RST_CLK_OK_STATE))
- return true;
- else
- return false;
-}
-
-static void enable_aoac_console_uart(void)
-{
- if (!CONFIG(PICASSO_UART))
- return;
-
- power_on_aoac_device(FCH_AOAC_UART_FOR_CONSOLE);
-}
-
-static bool is_aoac_console_uart_enabled(void)
-{
- if (!CONFIG(PICASSO_UART))
- return true;
-
- return is_aoac_device_enabled(FCH_AOAC_UART_FOR_CONSOLE);
-}
-
-void enable_aoac_devices(void)
-{
- bool status;
- int i;
-
- for (i = 0; i < ARRAY_SIZE(aoac_devs); i++)
- power_on_aoac_device(aoac_devs[i]);
- enable_aoac_console_uart();
-
- /* Wait for AOAC devices to indicate power and clock OK */
- do {
- udelay(100);
- status = true;
- for (i = 0; i < ARRAY_SIZE(aoac_devs); i++)
- status &= is_aoac_device_enabled(aoac_devs[i]);
- status &= is_aoac_console_uart_enabled();
- } while (!status);
-}
-
static void sb_enable_cf9_io(void)
{
uint32_t reg = pm_read32(PM_DECODE_EN);