diff options
| -rw-r--r-- | src/mainboard/emulation/qemu-i386/Config.lb | 163 | ||||
| -rw-r--r-- | src/mainboard/emulation/qemu-i386/Options.lb | 217 | ||||
| -rw-r--r-- | src/mainboard/emulation/qemu-i386/auto.c | 4 | ||||
| -rw-r--r-- | src/mainboard/emulation/qemu-i386/chip.h | 2 | ||||
| -rw-r--r-- | src/mainboard/emulation/qemu-i386/cmos.layout | 97 | ||||
| -rw-r--r-- | src/mainboard/emulation/qemu-i386/failover.c | 2 | ||||
| -rw-r--r-- | src/mainboard/emulation/qemu-i386/mainboard.c | 4 | ||||
| -rw-r--r-- | src/northbridge/emulation/qemu-i386/chip.h | 2 | ||||
| -rw-r--r-- | src/northbridge/emulation/qemu-i386/northbridge.c | 21 | ||||
| -rw-r--r-- | src/northbridge/emulation/qemu-i386/northbridge.h | 7 |
10 files changed, 386 insertions, 133 deletions
diff --git a/src/mainboard/emulation/qemu-i386/Config.lb b/src/mainboard/emulation/qemu-i386/Config.lb index 2f68d7e543..6ba87cada1 100644 --- a/src/mainboard/emulation/qemu-i386/Config.lb +++ b/src/mainboard/emulation/qemu-i386/Config.lb @@ -1,92 +1,14 @@ -# This is a dummy linuxbios for use in bochs or qemu -# -uses HAVE_MP_TABLE -uses HAVE_PIRQ_TABLE -uses USE_FALLBACK_IMAGE -uses HAVE_FALLBACK_BOOT -uses HAVE_HARD_RESET -uses HAVE_OPTION_TABLE -uses USE_OPTION_TABLE -uses CONFIG_ROM_STREAM -uses MAINBOARD -uses ARCH -uses FALLBACK_SIZE -uses STACK_SIZE -uses HEAP_SIZE -uses ROM_SIZE -uses ROM_SECTION_SIZE -uses ROM_IMAGE_SIZE -uses ROM_SECTION_SIZE -uses ROM_SECTION_OFFSET -uses CONFIG_ROM_STREAM_START -uses PAYLOAD_SIZE -uses _ROMBASE -uses XIP_ROM_SIZE -uses XIP_ROM_BASE -uses HAVE_MP_TABLE - -## ROM_SIZE is the size of boot ROM that this board will use. -default ROM_SIZE = 256*1024 - -### -### Build options -### - -## -## Build code for the fallback boot -## -default HAVE_FALLBACK_BOOT=1 - -## -## no MP table -## -default HAVE_MP_TABLE=0 - -## -## Build code to reset the motherboard from linuxBIOS -## -default HAVE_HARD_RESET=1 - -## -## Build code to export a programmable irq routing table -## -default HAVE_PIRQ_TABLE=0 - -## -## Build code to export a CMOS option table -## -default HAVE_OPTION_TABLE=1 - -### -### LinuxBIOS layout values -### - -## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy. -#default ROM_IMAGE_SIZE = 65536 -default ROM_IMAGE_SIZE = 32768 - -## -## Use a small 8K stack -## -default STACK_SIZE=0x2000 - -## -## Use a small 16K heap -## -default HEAP_SIZE=0x4000 -default USE_OPTION_TABLE = 0 - ## ## Compute the location and size of where this firmware image ## (linuxBIOS plus bootloader) will live in the boot rom chip. ## -#if USE_FALLBACK_IMAGE +if USE_FALLBACK_IMAGE default ROM_SECTION_SIZE = FALLBACK_SIZE default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE ) -#else -# default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) -# default ROM_SECTION_OFFSET = 0 -#end +else + default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE ) + default ROM_SECTION_OFFSET = 0 +end ## ## Compute the start location and size size of @@ -94,7 +16,6 @@ default USE_OPTION_TABLE = 0 ## default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) default CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -default CONFIG_ROM_STREAM = 1 ## ## Compute where this copy of linuxBIOS will start in the boot rom @@ -108,61 +29,59 @@ default _ROMBASE = ( CONFIG_ROM_STREAM_START + PAYLOAD_SIZE ) ## XIP_ROM_SIZE must be a power of 2. ## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE ## -default XIP_ROM_SIZE=0x8000 +default XIP_ROM_SIZE=65536 default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE ) -## -## Set all of the defaults for an x86 architecture -## - -arch i386 end -cpu p5 "qemu_cpu" end +arch i386 end ## ## Build the objects we have code for in this directory. ## driver mainboard.o +if HAVE_MP_TABLE object mptable.o end +if HAVE_PIRQ_TABLE object irq_tables.o end +#object reset.o ## ## Romcc output ## makerule ./failover.E - depends "$(MAINBOARD)/failover.c" - action "$(CPP) -I$(TOP)/src $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/failover.c > ./failover.E" + depends "$(MAINBOARD)/failover.c ./romcc" + action "./romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@" end makerule ./failover.inc - depends "./failover.E ./romcc" - action "./romcc -O -mcpu=i386 -o failover.inc --label-prefix=failover ./failover.E" + depends "$(MAINBOARD)/failover.c ./romcc" + action "./romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@" end makerule ./auto.E - depends "$(MAINBOARD)/auto.c" - action "$(CPP) -I$(TOP)/src $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/auto.c > ./auto.E" + depends "$(MAINBOARD)/auto.c option_table.h ./romcc" + action "./romcc -E -mcpu=i386 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" end makerule ./auto.inc - depends "./auto.E ./romcc" - action "./romcc -O -mcpu=i386 ./auto.E " + depends "$(MAINBOARD)/auto.c option_table.h ./romcc" + action "./romcc -mcpu=i386 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" end ## ## Build our 16 bit and 32 bit linuxBIOS entry code ## -mainboardinit cpu/i386/entry16.inc -mainboardinit cpu/i386/entry32.inc -ldscript /cpu/i386/entry16.lds -ldscript /cpu/i386/entry32.lds +mainboardinit cpu/x86/16bit/entry16.inc +mainboardinit cpu/x86/32bit/entry32.inc +ldscript /cpu/x86/16bit/entry16.lds +ldscript /cpu/x86/32bit/entry32.lds ## ## Build our reset vector (This is where linuxBIOS is entered) ## if USE_FALLBACK_IMAGE - mainboardinit cpu/i386/reset16.inc - ldscript /cpu/i386/reset16.lds + mainboardinit cpu/x86/16bit/reset16.inc + ldscript /cpu/x86/16bit/reset16.lds else - mainboardinit cpu/i386/reset32.inc - ldscript /cpu/i386/reset32.lds + mainboardinit cpu/x86/32bit/reset32.inc + ldscript /cpu/x86/32bit/reset32.lds end ### Should this be in the northbridge code? @@ -174,20 +93,15 @@ mainboardinit arch/i386/lib/cpu_reset.inc mainboardinit arch/i386/lib/id.inc ldscript /arch/i386/lib/id.lds -## -## Setup our mtrrs -## -# mainboardinit cpu/p6/earlymtrr.inc - ### ### This is the early phase of linuxBIOS startup ### Things are delicate and we test to see if we should ### failover to another image. ### -#if USE_FALLBACK_IMAGE -ldscript /arch/i386/lib/failover.lds -mainboardinit ./failover.inc -#end +if USE_FALLBACK_IMAGE + ldscript /arch/i386/lib/failover.lds + mainboardinit ./failover.inc +end ### ### O.k. We aren't just an intermediary anymore! @@ -196,16 +110,27 @@ mainboardinit ./failover.inc ## ## Setup RAM ## +mainboardinit cpu/x86/fpu/enable_fpu.inc +#mainboardinit cpu/x86/mmx/enable_mmx.inc +#mainboardinit cpu/x86/sse/enable_sse.inc mainboardinit ./auto.inc +#mainboardinit cpu/x86/sse/disable_sse.inc +#mainboardinit cpu/x86/mmx/disable_mmx.inc ## ## Include the secondary Configuration files ## dir /pc80 -dir /drivers/emulation/qemu config chip.h +# config for arima/hdama chip northbridge/emulation/qemu-i386 - pci_domain 0 - end + device pci_domain 0 on + end +# device apic_cluster 0 on +# chip cpu/amd/socket_940 +# device apic 0 on end +# end +# end end + diff --git a/src/mainboard/emulation/qemu-i386/Options.lb b/src/mainboard/emulation/qemu-i386/Options.lb index e69de29bb2..0d0023ff8e 100644 --- a/src/mainboard/emulation/qemu-i386/Options.lb +++ b/src/mainboard/emulation/qemu-i386/Options.lb @@ -0,0 +1,217 @@ +uses HAVE_MP_TABLE +uses HAVE_PIRQ_TABLE +uses USE_FALLBACK_IMAGE +uses HAVE_FALLBACK_BOOT +uses HAVE_HARD_RESET +uses HARD_RESET_BUS +uses HARD_RESET_DEVICE +uses HARD_RESET_FUNCTION +uses IRQ_SLOT_COUNT +uses HAVE_OPTION_TABLE +uses CONFIG_MAX_CPUS +uses CONFIG_IOAPIC +uses CONFIG_SMP +uses FALLBACK_SIZE +uses ROM_SIZE +uses ROM_SECTION_SIZE +uses ROM_IMAGE_SIZE +uses ROM_SECTION_SIZE +uses ROM_SECTION_OFFSET +uses CONFIG_ROM_STREAM +uses CONFIG_ROM_STREAM_START +uses PAYLOAD_SIZE +uses _ROMBASE +uses XIP_ROM_SIZE +uses XIP_ROM_BASE +uses STACK_SIZE +uses HEAP_SIZE +uses USE_OPTION_TABLE +uses LB_CKS_RANGE_START +uses LB_CKS_RANGE_END +uses LB_CKS_LOC +uses MAINBOARD +uses MAINBOARD_PART_NUMBER +uses MAINBOARD_VENDOR +uses LINUXBIOS_EXTRA_VERSION +uses _RAMBASE +uses CC +uses HOSTCC +uses TTYS0_BAUD +uses TTYS0_BASE +uses TTYS0_LCS +uses DEFAULT_CONSOLE_LOGLEVEL +uses MAXIMUM_CONSOLE_LOGLEVEL +uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL +uses CONFIG_CONSOLE_SERIAL8250 +uses HAVE_INIT_TIMER +uses CONFIG_GDB_STUB + +### +### Build options +### + +## +## ROM_SIZE is the size of boot ROM that this board will use. +## +default ROM_SIZE=0x40000 + +## +## FALLBACK_SIZE is the amount of the ROM the complete fallback image will use +## +default FALLBACK_SIZE=0x40000 + +## +## Build code for the fallback boot +## +default HAVE_FALLBACK_BOOT=1 + +## +## Build code to reset the motherboard from linuxBIOS +## +default HAVE_HARD_RESET=0 + +## +## Funky hard reset implementation +## +# default HARD_RESET_BUS=1 +# default HARD_RESET_DEVICE=4 +# default HARD_RESET_FUNCTION=0 + +## +## Build code to export a programmable irq routing table +## +default HAVE_PIRQ_TABLE=0 +default IRQ_SLOT_COUNT=9 + +## +## Build code to export an x86 MP table +## Useful for specifying IRQ routing values +## +default HAVE_MP_TABLE=0 + +## +## Build code to export a CMOS option table +## +default HAVE_OPTION_TABLE=1 + +## +## Move the default LinuxBIOS cmos range off of AMD RTC registers +## +default LB_CKS_RANGE_START=49 +default LB_CKS_RANGE_END=122 +default LB_CKS_LOC=123 + +## +## Build code for SMP support +## Only worry about 2 micro processors +## +default CONFIG_SMP=0 +default CONFIG_MAX_CPUS=2 + +## +## Build code to setup a generic IOAPIC +## +default CONFIG_IOAPIC=1 + +## +## Clean up the motherboard id strings +## +default MAINBOARD_PART_NUMBER="x86" +default MAINBOARD_VENDOR="QEMU" + + +### +### LinuxBIOS layout values +### + +## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy. +default ROM_IMAGE_SIZE = 65536 + +## +## Use a small 8K stack +## +default STACK_SIZE=0x2000 + +## +## Use a small 16K heap +## +default HEAP_SIZE=0x4000 + +## +## Only use the option table in a normal image +## +default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE + +## +## LinuxBIOS C code runs at this location in RAM +## +default _RAMBASE=0x00004000 + +## +## Load the payload from the ROM +## +default CONFIG_ROM_STREAM = 1 + +### +### Defaults of options that you may want to override in the target config file +### + +## +## The default compiler +## +default CC="gcc -m32" +default HOSTCC="gcc" + +## +## Disable the gdb stub by default +## +default CONFIG_GDB_STUB=0 + +## +## The Serial Console +## + +# To Enable the Serial Console +default CONFIG_CONSOLE_SERIAL8250=1 + +## Select the serial console baud rate +default TTYS0_BAUD=115200 +#default TTYS0_BAUD=57600 +#default TTYS0_BAUD=38400 +#default TTYS0_BAUD=19200 +#default TTYS0_BAUD=9600 +#default TTYS0_BAUD=4800 +#default TTYS0_BAUD=2400 +#default TTYS0_BAUD=1200 + +# Select the serial console base port +default TTYS0_BASE=0x3f8 + +# Select the serial protocol +# This defaults to 8 data bits, 1 stop bit, and no parity +default TTYS0_LCS=0x3 + +## +### Select the linuxBIOS loglevel +## +## EMERG 1 system is unusable +## ALERT 2 action must be taken immediately +## CRIT 3 critical conditions +## ERR 4 error conditions +## WARNING 5 warning conditions +## NOTICE 6 normal but significant condition +## INFO 7 informational +## DEBUG 8 debug-level messages +## SPEW 9 Way too many details + +## Request this level of debugging output +default DEFAULT_CONSOLE_LOGLEVEL=9 +## At a maximum only compile in this level of debugging +default MAXIMUM_CONSOLE_LOGLEVEL=9 + +## +## Select power on after power fail setting +default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON" + +### End Options.lb +end diff --git a/src/mainboard/emulation/qemu-i386/auto.c b/src/mainboard/emulation/qemu-i386/auto.c index 819a120018..a4259df0fe 100644 --- a/src/mainboard/emulation/qemu-i386/auto.c +++ b/src/mainboard/emulation/qemu-i386/auto.c @@ -3,14 +3,12 @@ #include <stdint.h> #include <device/pci_def.h> #include <device/pci_ids.h> -#include <cpu/p6/apic.h> #include <arch/io.h> #include <device/pnp_def.h> #include <arch/romcc_io.h> #include <arch/hlt.h> #include "pc80/serial.c" #include "arch/i386/lib/console.c" -#include "cpu/p6/earlymtrr.c" /* */ @@ -22,7 +20,7 @@ void udelay(int usecs) } #include "lib/delay.c" -#include "cpu/p6/boot_cpu.c" +#include "cpu/x86/lapic/boot_cpu.c" #include "debug.c" static void main(void) diff --git a/src/mainboard/emulation/qemu-i386/chip.h b/src/mainboard/emulation/qemu-i386/chip.h index 5e49952ba0..51e37b1bc3 100644 --- a/src/mainboard/emulation/qemu-i386/chip.h +++ b/src/mainboard/emulation/qemu-i386/chip.h @@ -1,4 +1,4 @@ -extern struct chip_operations mainboard_emulation_qemu_i386_control; +extern struct chip_operations mainboard_emulation_qemu_i386_ops; struct mainboard_emulation_qemu_i386_config { int nothing; diff --git a/src/mainboard/emulation/qemu-i386/cmos.layout b/src/mainboard/emulation/qemu-i386/cmos.layout new file mode 100644 index 0000000000..ea027282c4 --- /dev/null +++ b/src/mainboard/emulation/qemu-i386/cmos.layout @@ -0,0 +1,97 @@ +entries + +#start-bit length config config-ID name +#0 8 r 0 seconds +#8 8 r 0 alarm_seconds +#16 8 r 0 minutes +#24 8 r 0 alarm_minutes +#32 8 r 0 hours +#40 8 r 0 alarm_hours +#48 8 r 0 day_of_week +#56 8 r 0 day_of_month +#64 8 r 0 month +#72 8 r 0 year +#80 4 r 0 rate_select +#84 3 r 0 REF_Clock +#87 1 r 0 UIP +#88 1 r 0 auto_switch_DST +#89 1 r 0 24_hour_mode +#90 1 r 0 binary_values_enable +#91 1 r 0 square-wave_out_enable +#92 1 r 0 update_finished_enable +#93 1 r 0 alarm_interrupt_enable +#94 1 r 0 periodic_interrupt_enable +#95 1 r 0 disable_clock_updates +#96 288 r 0 temporary_filler +0 384 r 0 reserved_memory +384 1 e 4 boot_option +385 1 e 4 last_boot +386 1 e 1 ECC_memory +388 4 r 0 reboot_bits +392 3 e 5 baud_rate +395 1 e 1 hw_scrubber +396 1 e 1 interleave_chip_selects +397 2 e 8 max_mem_clock +400 1 e 1 power_on_after_fail +412 4 e 6 debug_level +416 4 e 7 boot_first +420 4 e 7 boot_second +424 4 e 7 boot_third +428 4 h 0 boot_index +432 8 h 0 boot_countdown +440 4 e 9 slow_cpu +444 1 e 1 nmi +445 1 e 1 iommu +728 256 h 0 user_data +984 16 h 0 check_sum +# Reserve the extended AMD configuration registers +1000 24 r 0 reserved_memory + + + +enumerations + +#ID value text +1 0 Disable +1 1 Enable +2 0 Enable +2 1 Disable +4 0 Fallback +4 1 Normal +5 0 115200 +5 1 57600 +5 2 38400 +5 3 19200 +5 4 9600 +5 5 4800 +5 6 2400 +5 7 1200 +6 6 Notice +6 7 Info +6 8 Debug +6 9 Spew +7 0 Network +7 1 HDD +7 2 Floppy +7 8 Fallback_Network +7 9 Fallback_HDD +7 10 Fallback_Floppy +#7 3 ROM +8 0 200Mhz +8 1 166Mhz +8 2 133Mhz +8 3 100Mhz +9 0 off +9 1 87.5% +9 2 75.0% +9 3 62.5% +9 4 50.0% +9 5 37.5% +9 6 25.0% +9 7 12.5% + +checksums + +checksum 392 983 984 + + diff --git a/src/mainboard/emulation/qemu-i386/failover.c b/src/mainboard/emulation/qemu-i386/failover.c index bd0df4e89d..10bb2f48c1 100644 --- a/src/mainboard/emulation/qemu-i386/failover.c +++ b/src/mainboard/emulation/qemu-i386/failover.c @@ -5,7 +5,7 @@ #include <arch/io.h> #include "arch/romcc_io.h" #include "pc80/mc146818rtc_early.c" -#include "cpu/p6/boot_cpu.c" +#include "cpu/x86/lapic/boot_cpu.c" static void main(void) { diff --git a/src/mainboard/emulation/qemu-i386/mainboard.c b/src/mainboard/emulation/qemu-i386/mainboard.c index 3dd280094d..173f8aa2ab 100644 --- a/src/mainboard/emulation/qemu-i386/mainboard.c +++ b/src/mainboard/emulation/qemu-i386/mainboard.c @@ -29,8 +29,8 @@ static void enable_dev(struct device *dev) dev->ops = &mainboard_operations; } -struct chip_operations mainboard_emulation_qemu_i386_control = { +struct chip_operations mainboard_emulation_qemu_i386_ops = { .enable_dev = enable_dev, - .name = "qemu mainboard ", + //.name = "qemu mainboard ", }; diff --git a/src/northbridge/emulation/qemu-i386/chip.h b/src/northbridge/emulation/qemu-i386/chip.h index d93a4b6afd..891c6cc448 100644 --- a/src/northbridge/emulation/qemu-i386/chip.h +++ b/src/northbridge/emulation/qemu-i386/chip.h @@ -2,4 +2,4 @@ struct northbridge_emulation_qemu_i386_config { }; -extern struct chip_operations northbridge_emulation_qemu_i386_control; +extern struct chip_operations northbridge_emulation_qemu_i386_ops; diff --git a/src/northbridge/emulation/qemu-i386/northbridge.c b/src/northbridge/emulation/qemu-i386/northbridge.c index cd06573067..09fa573090 100644 --- a/src/northbridge/emulation/qemu-i386/northbridge.c +++ b/src/northbridge/emulation/qemu-i386/northbridge.c @@ -38,11 +38,28 @@ static void pci_domain_read_resources(device_t dev) IORESOURCE_MEM, IORESOURCE_MEM); } +static void ram_resource(device_t dev, unsigned long index, + unsigned long basek, unsigned long sizek) +{ + struct resource *resource; + + if (!sizek) { + return; + } + resource = new_resource(dev, index); + resource->base = ((resource_t)basek) << 10; + resource->size = ((resource_t)sizek) << 10; + resource->flags = IORESOURCE_MEM | IORESOURCE_CACHEABLE | \ + IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED; +} + + static void pci_domain_set_resources(device_t dev) { struct resource *resource, *last; device_t mc_dev; uint32_t pci_tolm; + uint32_t idx; pci_tolm = 0xffffffffUL; last = &dev->resource[dev->resources]; @@ -110,7 +127,7 @@ static void enable_dev(struct device *dev) } } -struct chip_operations northbridge_emulation_qemu_i386_control = { - .name = "QEMU Northbridge", +struct chip_operations northbridge_emulation_qemu_i386_ops = { + // .name = "QEMU Northbridge", .enable_dev = enable_dev, }; diff --git a/src/northbridge/emulation/qemu-i386/northbridge.h b/src/northbridge/emulation/qemu-i386/northbridge.h index ef63ebea78..c74e63b97d 100644 --- a/src/northbridge/emulation/qemu-i386/northbridge.h +++ b/src/northbridge/emulation/qemu-i386/northbridge.h @@ -1,6 +1,5 @@ -#ifndef NORTHBRIDGE_VIA_VT8623_H -#define NORTHBRIDGE_VIA_VT8623_H +#ifndef NORTHBRIDGE_EMULATION_QEMU_I386_H +#define NORTHBRIDGE_EMULATION_QEMU_I386_H -extern unsigned int vt8623_scan_root_bus(device_t root, unsigned int max); -#endif /* NORTHBRIDGE_VIA_VT8623_H */ +#endif /* NORTHBRIDGE_EMULATION_QEMU_I386 */ |