diff options
40 files changed, 1451 insertions, 400 deletions
diff --git a/src/arch/i386/boot/linuxbios_table.c b/src/arch/i386/boot/linuxbios_table.c index 0866639f1e..594b5e55a9 100644 --- a/src/arch/i386/boot/linuxbios_table.c +++ b/src/arch/i386/boot/linuxbios_table.c @@ -306,6 +306,12 @@ struct lb_memory *get_lb_mem(void) return mem_ranges; } +static void build_lb_mem_range(void *gp, struct device *dev, struct resource *res) +{ + struct lb_memory *mem = gp; + lb_memory_range(mem, LB_MEM_RAM, res->base, res->size); +} + static struct lb_memory *build_lb_mem(struct lb_header *head) { struct lb_memory *mem; @@ -316,17 +322,9 @@ static struct lb_memory *build_lb_mem(struct lb_header *head) mem_ranges = mem; /* Build the raw table of memory */ - for(dev = all_devices; dev; dev = dev->next) { - struct resource *res, *last; - last = &dev->resource[dev->resources]; - for(res = &dev->resource[0]; res < last; res++) { - if (!(res->flags & IORESOURCE_MEM) || - !(res->flags & IORESOURCE_CACHEABLE)) { - continue; - } - lb_memory_range(mem, LB_MEM_RAM, res->base, res->size); - } - } + search_global_resources( + IORESOURCE_MEM | IORESOURCE_CACHEABLE, IORESOURCE_MEM | IORESOURCE_CACHEABLE, + build_lb_mem_range, mem); lb_cleanup_memory_ranges(mem); return mem; } diff --git a/src/arch/i386/init/ldscript.lb b/src/arch/i386/init/ldscript.lb index 1af399cf81..ba8078b005 100644 --- a/src/arch/i386/init/ldscript.lb +++ b/src/arch/i386/init/ldscript.lb @@ -30,10 +30,17 @@ OUTPUT_ARCH(i386) ENTRY(_start) TARGET(binary) -INPUT(linuxbios_payload) +INPUT(linuxbios_ram.rom) SECTIONS { . = _ROMBASE; + + .ram . : { + _ram = . ; + linuxbios_ram.rom(*) + _eram = . ; + } + /* This section might be better named .setup */ .rom . : { _rom = .; @@ -42,18 +49,13 @@ SECTIONS . = ALIGN(16); _erom = .; } + _lrom = LOADADDR(.rom); _elrom = LOADADDR(.rom) + SIZEOF(.rom); - - .payload . : { - _payload = . ; - linuxbios_payload(*) - _epayload = . ; - } _iseg = _RAMBASE; - _eiseg = _iseg + SIZEOF(.payload); - _liseg = _payload; - _eliseg = _epayload; + _eiseg = _iseg + SIZEOF(.ram); + _liseg = _ram; + _eliseg = _eram; /DISCARD/ : { *(.comment) diff --git a/src/arch/i386/lib/Config.lb b/src/arch/i386/lib/Config.lb index 092434acab..82adea0e0c 100644 --- a/src/arch/i386/lib/Config.lb +++ b/src/arch/i386/lib/Config.lb @@ -7,4 +7,4 @@ object c_start.S object cpu.c object pci_ops.c - +object exception.c diff --git a/src/arch/i386/lib/c_start.S b/src/arch/i386/lib/c_start.S index c82da2f76e..2e397f8847 100644 --- a/src/arch/i386/lib/c_start.S +++ b/src/arch/i386/lib/c_start.S @@ -1,5 +1,6 @@ #include <arch/asm.h> #include <arch/intel.h> + .section ".text" .code32 .globl _start @@ -47,6 +48,24 @@ _start: /* Save the stack location */ movl %esp, %ebp + /* Initialize the Interrupt Descriptor table */ + leal _idt, %edi + leal vec0, %ebx + movl $(0x10 << 16), %eax /* cs selector */ + +1: movw %bx, %ax + movl %ebx, %edx + movw $0x8E00, %dx /* Interrupt gate - dpl=0, present */ + movl %eax, 0(%edi) + movl %edx, 4(%edi) + addl $6, %ebx + addl $8, %edi + cmpl $_idt_end, %edi + jne 1b + + /* Load the Interrupt descriptor table */ + lidt idtarg + /* * Now we are finished. Memory is up, data is copied and * bss is cleared. Now we call the main routine and @@ -64,15 +83,170 @@ _start: intel_chip_post_macro(0xee) /* post fe */ hlt jmp .Lhlt + +vec0: + pushl $0 /* error code */ + pushl $0 /* vector */ + jmp int_hand +vec1: + pushl $0 /* error code */ + pushl $1 /* vector */ + jmp int_hand + +vec2: + pushl $0 /* error code */ + pushl $2 /* vector */ + jmp int_hand + +vec3: + pushl $0 /* error code */ + pushl $3 /* vector */ + jmp int_hand + +vec4: + pushl $0 /* error code */ + pushl $4 /* vector */ + jmp int_hand + +vec5: + pushl $0 /* error code */ + pushl $5 /* vector */ + jmp int_hand + +vec6: + pushl $0 /* error code */ + pushl $6 /* vector */ + jmp int_hand + +vec7: + pushl $0 /* error code */ + pushl $7 /* vector */ + jmp int_hand + +vec8: + /* error code */ + pushl $8 /* vector */ + jmp int_hand + .word 0x9090 + +vec9: + pushl $0 /* error code */ + pushl $9 /* vector */ + jmp int_hand + +vec10: + /* error code */ + pushl $10 /* vector */ + jmp int_hand + .word 0x9090 + +vec11: + /* error code */ + pushl $11 /* vector */ + jmp int_hand + .word 0x9090 + +vec12: + /* error code */ + pushl $12 /* vector */ + jmp int_hand + .word 0x9090 + +vec13: + /* error code */ + pushl $13 /* vector */ + jmp int_hand + .word 0x9090 + +vec14: + /* error code */ + pushl $14 /* vector */ + jmp int_hand + .word 0x9090 + +vec15: + pushl $0 /* error code */ + pushl $15 /* vector */ + jmp int_hand + +vec16: + pushl $0 /* error code */ + pushl $16 /* vector */ + jmp int_hand + +vec17: + /* error code */ + pushl $17 /* vector */ + jmp int_hand + .word 0x9090 + +vec18: + pushl $0 /* error code */ + pushl $18 /* vector */ + jmp int_hand + +vec19: + pushl $0 /* error code */ + pushl $19 /* vector */ + jmp int_hand +int_hand: + /* At this point on the stack there is: + * 0(%esp) vector + * 4(%esp) error code + * 8(%esp) eip + * 12(%esp) cs + * 16(%esp) eflags + */ + pushl %edi + pushl %esi + pushl %ebp + /* Original stack pointer */ + leal 32(%esp), %ebp + pushl %ebp + pushl %ebx + pushl %edx + pushl %ecx + pushl %eax + pushl %esp /* Pointer to structure on the stack */ + call x86_exception + pop %eax /* Drop the pointer */ - .globl gdt, gdt_end, gdt_limit + popl %eax + popl %ecx + popl %edx + popl %ebx + popl %ebp /* Ignore saved %esp value */ + popl %ebp + popl %esi + popl %edi + + addl $8, %esp /* pop of the vector and error code */ + + iret + +#if CONFIG_GDB_STUB == 1 + + .globl gdb_stub_breakpoint +gdb_stub_breakpoint: + popl %eax /* Return address */ + pushfl + pushl %cs + pushl %eax /* Return address */ + pushl $0 /* No error code */ + pushl $32 /* vector 32 is user defined */ + jmp int_hand + +#endif + + .globl gdt, gdt_end, gdt_limit, idtarg gdt_limit = gdt_end - gdt - 1 /* compute the table limit */ gdtaddr: .word gdt_limit .long gdt /* we know the offset */ + .data gdt: // selgdt 0 .word 0x0000, 0x0000 /* dummy */ @@ -112,4 +286,13 @@ gdt: #endif // defined(CONFIG_VGABIOS) && (CONFIG_VGABIOS == 1) gdt_end: +idtarg: + .word _idt_end - _idt - 1 /* limit */ + .long _idt + .word 0 +_idt: + .fill 20, 8, 0 # idt is unitiailzed +_idt_end: + + .previous .code32 diff --git a/src/arch/i386/llshell/llshell.inc b/src/arch/i386/llshell/llshell.inc new file mode 100644 index 0000000000..8054a0a6e7 --- /dev/null +++ b/src/arch/i386/llshell/llshell.inc @@ -0,0 +1,880 @@ +jmp llshell_out + +// (c) 2004 Bryan Chafy, This program is released under the GPL + +// LLShell, A low level interactive debug shell +// Designed to be an interactive shell that operates with zero +// system resources. For example at initial boot. + +// to use, jump to label "low_level_shell" +// set %esp to the return address for exiting + + +#define UART_BASEADDR $0x3f8 +#define resultreg %esi +#define subroutinereg %edi +#define freqtime $2193 // 1.93 * freq +#define timertime $6000 +.equ sys_IOPL, 110 + +// .data +// .text + +welcome: + .string "\r\n! Low Level Shell (LLShell) (c)2004 Bryan Chafy \r\n\r\n" +prompt: + .string "\r\n!> " +badcmd: + .string "bad command\r\n" +sorry: + .string "sorry, not yet implemented\r\n" +cmds: + .string "\r\nList of commands:\r\n \ +\r\nbeep -- pc speaker beep \ +\r\nrst (or RST) -- reset \ +\r\nout(b,w,l) <val> <port> -- raw out val at port \ +\r\nin(b,w,l) <port> -- show raw port value \ +\r\njmp <address> -- jmp to address (llshell addr is in eax) \ +\r\ncall <address> -- funcion call (assumes a working stack) \ +\r\ncli -- clear interrupts \ +\r\nsti -- enable interrupts \ +\r\npush <value> -- push value onto stack \ +\r\npop -- pop from stack and display \ +\r\nwm(b,w,l) <addr> <val> -- write mem \ +\r\ndm <addr> <lines> -- dump mem \ +\r\nmcp <src> <dst> <size> -- mem copy \ +\r\nmpat <pat> <dst> <size> -- mem pattern \ +\r\nmemt <begin> <end> -- memory test \ +\r\npcir(b,w,l) <loc> -- pci read config \ +\r\npciw(b,w,l) <loc> <val> -- pci write config \ +\r\ndl <addr> <size> -- memory download (display xor cheksum at completion) \ +\r\ncram <addr> <size> -- enable cache to be ram (experimental) \ +\r\nbaud <val> -- change baudrate (not yet implemented) \ +\r\nexit -- exit shell \ +\r\nAll values in hex (0x prefixing ok) \ +\r\n" + +cr: + .string "\r\n" +spaces: + .string " " + +// .globl _start +//ASSUME CS:@CODE, DS:@DATA + +// _start: + +// call ioperms + +low_level_shell: + +mov $preamble,subroutinereg +jmp beep +preamble: +mov $welcome,resultreg +mov $readcommand,subroutinereg +jmp displaystring + +readcommand: +mov $prompt,resultreg +mov $rcmd,subroutinereg +jmp displaystring + +rcmd: +mov $readcommand,subroutinereg +movl $0x0, resultreg + +readchar: +mov UART_BASEADDR+5,%dx +in %dx, %al +and $0x9f,%al +test $0x01,%al +jz readchar +mov UART_BASEADDR,%dx +in %dx,%al //char in al +xchg %al,%ah + +send_char: +mov UART_BASEADDR+5,%dx +us_wait: +in %dx,%al +test $0x20,%al +jz us_wait +mov UART_BASEADDR,%dx +xchg %al,%ah +out %al,%dx // output char + +cmp $0x0D,%al //CR +jnz eval_char +mov $0x0A,%ah +jmp send_char + +eval_char: +cmp $0x20,%al //space +jz cmdtable +cmp $0x0A,%al //CR +jz cmdtable +cmp $0x08,%al //BS +jnz additup +//subit: +shr $0x8,resultreg +jmp readchar +additup: +shl $0x8,resultreg +and $0xff,%eax +add %eax,resultreg +jmp readchar + +cmdtable: +mov resultreg,%eax +cmp $0,%eax +jz readcommand +cmp $0x74657374,%eax +jz dotest +cmp $0x68656c70,%eax +jz dohelp +cmp $0x0000003f,%eax +jz dohelp +cmp $0x6f757462,%eax +jz dooutb +cmp $0x6f757477,%eax +jz dooutw +cmp $0x6f75746c,%eax +jz dooutd +cmp $0x00696e62,%eax +jz doinb +cmp $0x00696e77,%eax +jz doinw +cmp $0x00696e6c,%eax +jz doind +cmp $0x63697262,%eax +jz pcirb +cmp $0x63697277,%eax +jz pcirw +cmp $0x6369726c,%eax +jz pcirl +cmp $0x63697762,%eax +jz pciwb +cmp $0x63697777,%eax +jz pciww +cmp $0x6369776c,%eax +jz pciwl +cmp $0x00776d62,%eax +jz wmemb +cmp $0x00776d77,%eax +jz wmemw +cmp $0x00776d6c,%eax +jz wmeml +cmp $0x0000646d,%eax +jz dodmem +cmp $0x6d656d74,%eax +jz memt // mem test +cmp $0x00727374,%eax +jz rst // reset +cmp $0x00525354,%eax +jz RST +cmp $0x62656570,%eax +jz beep +cmp $0x0000646c,%eax +jz dodl // download to mem <loc> <size> +cmp $0x006a6d70,%eax +jz jmpto // jump to location (eax holds return addr) +cmp $0x62617564,%eax +jz baud // change baudrate +cmp $0x00696e74,%eax +jz doint // trigger an interrupt +cmp $0x63616c6c,%eax +jz callto // call assumes memory +cmp $0x70757368,%eax +jz dopush // assumes mem +cmp $0x00706f70,%eax +jz dopop // assumes mem +cmp $0x6372616d,%eax +jz cram // cache ram trick <location> <size> +cmp $0x006d6370,%eax +jz mcp // mem copy <src> <dst> <size> +cmp $0x6d706174,%eax +jz dopattern +cmp $0x00636c69,%eax +jz docli +cmp $0x00737469,%eax +jz dosti +cmp $0x65786974,%eax +jz doexit +mov $badcmd,resultreg +mov $readcommand,subroutinereg +jmp displaystring + + +readnibbles: +movl $0x0, resultreg +readit: +mov UART_BASEADDR+5,%dx +in %dx, %al +and $0x9f,%al +test $0x1,%al +jz readit +mov UART_BASEADDR,%dx +in %dx,%al +xchg %al,%ah + +sendchar: +mov UART_BASEADDR+5,%dx +us_waitit: +in %dx,%al +test $0x20,%al +jz us_waitit +mov UART_BASEADDR,%dx +xchg %al,%ah +out %al,%dx // output char + +cmp $0x78,%al +jz readit +cmp $0x0D,%al //CR +jnz evalchar +mov $0x0A,%ah +jmp sendchar + +evalchar: +cmp $0x20,%al //space +jz gosub +cmp $0x0A,%al //CR +jz gosub +cmp $0x08,%al //BS +jnz processchar +//subit: +shr $0x04,resultreg +jmp readit +processchar: +cmp $0x3A,%al +jl subnum +cmp $0x47,%al +jl subcaps +//sublc: +sub $0x57,%al +jmp additupn +subcaps: +sub $0x37,%al +jmp additupn +subnum: +sub $0x30,%al +additupn: +shl $0x04,resultreg +and $0xf,%eax +add %eax,resultreg +jmp readit + +gosub: +jmp *subroutinereg + +//intersubcall +// eax,edx,esi,edi + +// ebx,ecx,ebp,esp(?) +// ds,es,fs,gs + +dotest: +mov $ramtest,resultreg +mov $test1a,subroutinereg +jmp displayhex +test1a: +mov $welcome,resultreg +mov $readcommand,subroutinereg +jmp displayhex + +dodmem: + +movl $dmem1a, subroutinereg +jmp readnibbles +dmem1a: +mov resultreg,%ebx // address +movl $dmem1b, subroutinereg +jmp readnibbles +dmem1b: +mov resultreg,%ecx // length + +dmemloop: +mov %ebx,resultreg +mov $daddr1,subroutinereg +jmp displayhex +daddr1: +mov $spaces,resultreg +mov $startshowm,subroutinereg +jmp displaystring + +startshowm: +mov (%ebx),resultreg +mov $showm1,subroutinereg +jmp displayhexlinear +showm1: +add $0x04,%ebx +mov (%ebx),resultreg +mov $showm2,subroutinereg +jmp displayhexlinear +showm2: +add $0x04,%ebx +mov (%ebx),resultreg +mov $showm3,subroutinereg +jmp displayhexlinear +showm3: +add $0x04,%ebx +mov (%ebx),resultreg +mov $showa0,subroutinereg +jmp displayhexlinear + +showa0: +sub $0xC,%ebx +mov (%ebx),resultreg +mov $showa1,subroutinereg +jmp displayasciilinear +showa1: +add $0x04,%ebx +mov (%ebx),resultreg +mov $showa2,subroutinereg +jmp displayasciilinear +showa2: +add $0x04,%ebx +mov (%ebx),resultreg +mov $showa3,subroutinereg +jmp displayasciilinear +showa3: +add $0x04,%ebx +mov (%ebx),resultreg +mov $doneshow,subroutinereg +jmp displayasciilinear +doneshow: +mov $cr,resultreg +mov $doneshow1,subroutinereg +jmp displaystring +doneshow1: +dec %cx +cmp $0x0,%cx +jz exitdmem +add $0x04,%ebx +jmp dmemloop +exitdmem: +jmp readcommand + +dooutb: +// out val,port +movl $outb1a, subroutinereg +jmp readnibbles +outb1a: +mov resultreg,%ebx +movl $outb1b, subroutinereg +jmp readnibbles +outb1b: +mov resultreg,%edx +mov %ebx,%eax +out %al,%dx +jmp readcommand + +dooutw: +// out val,port +movl $outw1a, subroutinereg +jmp readnibbles +outw1a: +mov resultreg,%ebx +movl $outw1b, subroutinereg +jmp readnibbles +outw1b: +mov resultreg,%edx +mov %ebx,%eax +out %ax,%dx +jmp readcommand + +dooutd: +// out val,port +movl $outd1a, subroutinereg +jmp readnibbles +outd1a: +mov resultreg,%ebx +movl $outd1b, subroutinereg +jmp readnibbles +outd1b: +mov resultreg,%edx +mov %ebx,%eax +out %eax,%dx +jmp readcommand + +wmemb: +movl $wmemba, subroutinereg +jmp readnibbles +wmemba: +mov resultreg,%ebx +movl $wmembb, subroutinereg +jmp readnibbles +wmembb: +mov resultreg,%eax +mov %al,(%ebx) +jmp readcommand + +wmemw: +movl $wmemwa, subroutinereg +jmp readnibbles +wmemwa: +mov resultreg,%ebx +movl $wmemwb, subroutinereg +jmp readnibbles +wmemwb: +mov resultreg,%eax +mov %ax,(%ebx) +jmp readcommand + +wmeml: +movl $wmemla, subroutinereg +jmp readnibbles +wmemla: +mov resultreg,%ebx +movl $wmemlb, subroutinereg +jmp readnibbles +wmemlb: +mov resultreg,%eax +mov %eax,(%ebx) +jmp readcommand + +doinb: +// in port +movl $inb1a, subroutinereg +jmp readnibbles +inb1a: +mov resultreg,%edx +mov $0x0,%eax +in %dx,%al +mov %eax,resultreg +mov $readcommand,subroutinereg +jmp displayhex + +doinw: +// in port +movl $inw1a, subroutinereg +jmp readnibbles +inw1a: +mov resultreg,%edx +mov $0x0,%eax +in %dx,%ax +mov %eax,resultreg +mov $readcommand,subroutinereg +jmp displayhex + +doind: +// in port +movl $ind1a, subroutinereg +jmp readnibbles +ind1a: +mov resultreg,%edx +in %dx,%eax +mov %eax,resultreg +mov $readcommand,subroutinereg +jmp displayhex + +jmpto: +movl $jmp1a, subroutinereg +jmp readnibbles +jmp1a: +mov $readcommand,%eax +jmp *resultreg + +callto: +movl $call1a, subroutinereg +jmp readnibbles +call1a: +mov $readcommand,%eax +call *resultreg +jmp readcommand + +dopush: +movl $push1a, subroutinereg +jmp readnibbles +push1a: +mov resultreg,%eax +push %eax +jmp readcommand + +doint: +movl $int1a, subroutinereg +jmp readnibbles +int1a: +mov resultreg,%eax +// need to lookup int table? +// int %eax +jmp readcommand + +doenter: +//setup stack frame + + +dopop: +movl $readcommand, subroutinereg +pop resultreg +jmp displayhex + +docli: +cli +jmp readcommand + +dosti: +sti +jmp readcommand + + +displaystring: +// resultreg= pointer to string terminated by \0 +dsloop: +movb (resultreg),%ah +cmp $0x0, %ah +jz displaystringexit +mov UART_BASEADDR+5,%dx +us_waits: +in %dx,%al +test $0x20,%al +jz us_waits +mov UART_BASEADDR,%dx +xchg %al,%ah +out %al,%dx // output char +inc resultreg +jmp dsloop +displaystringexit: +jmp *subroutinereg + +displayhexlinear: +mov resultreg,%eax +xchg %al,%ah +rol $0x10,%eax +xchg %al,%ah +mov %eax,resultreg +displayhex: +rol $0x10,%ecx +mov $0x8,%cx +dhloop: +cmp $0xf,%cl +je exitdisplayhex +rol $0x04,resultreg +movl resultreg,%eax +and $0xf,%al +cmp $0xa,%al +jl addnum +//addcaps +add $0x37,%al +jmp outcharhex +addnum: +add $0x30,%al +outcharhex: +xchg %al,%ah +mov UART_BASEADDR+5,%dx +us_waith: +in %dx,%al +test $0x20,%al +jz us_waith +mov UART_BASEADDR,%dx +xchg %al,%ah +out %al,%dx // output char +dec %cx +cmp $0x0,%cx +jne dhloop +mov $0x20,%al +mov $0x10,%cl +jmp outcharhex +exitdisplayhex: +rol $0x10,%ecx +jmp *subroutinereg + +displayasciilinear: +mov resultreg,%eax +xchg %al,%ah +rol $0x10,%eax +xchg %al,%ah +mov %eax,resultreg +displayascii: +rol $0x10,%ecx +mov $0x4,%cx +daloop: +rol $0x08,resultreg +movl resultreg,%eax +cmp $0x7e,%al +jg unprintable +cmp $0x20,%al +jl unprintable +jmp outcharascii +unprintable: +mov $0x2e,%al // dot +outcharascii: +xchg %al,%ah +mov UART_BASEADDR+5,%dx +us_waita: +in %dx,%al +test $0x20,%al +jz us_waita +mov UART_BASEADDR,%dx +xchg %al,%ah +out %al,%dx // output char +dec %cx +cmp $0x0,%cx +jne daloop +rol $0x10,%ecx +jmp *subroutinereg + +rst: +cli +movb $0x0fe,%al +out %al,$0x64 +hlt + +RST: +cli +lidt %cs:0x03fff +int $0x3 +hlt + + +beep: +mov timertime,%eax +rol $0x10,%eax +mov $0xb6,%al +out %al,$0x43 +mov freqtime,%ax +out %al,$0x42 +xchg %al,%ah +out %al,$0x42 + +in $0x61,%al +or $0x03,%al +out %al,$0x61 + +//timer here +timer: +in $0x42,%al +// xchg %al,%ah +in $0x42,%al +// xchg %al,%ah +cmp $0x0,%al +jnz timer +rol $0x10,%eax +dec %ax +cmp $0x0,%ax; +rol $0x10,%eax +jnz timer +// timer + +in $0x61,%al +and $0xfc,%al +out %al,$0x61 +jmp *subroutinereg + +dohelp: +mov $cmds,resultreg +mov $readcommand,subroutinereg +jmp displaystring + +memt: +movl $memt1, subroutinereg +jmp readnibbles +memt1: +mov resultreg,%ecx +movl $memt2, subroutinereg +jmp readnibbles +memt2: +mov resultreg,%ebx +xchg %ecx,%eax +mov $readcommand,%esp // internal to linux bios +jmp ramtest + +pcirb: +movl $pcirb1, subroutinereg +jmp readnibbles +pcirb1: +mov resultreg,%eax +PCI_READ_CONFIG_BYTE +and $0xff,%eax +mov %eax,resultreg +mov $readcommand,subroutinereg +jmp displayhex + +pcirw: +movl $pcirw1, subroutinereg +jmp readnibbles +pcirw1: +mov resultreg,%eax +PCI_READ_CONFIG_WORD +and $0xffff,%eax +mov %eax,resultreg +mov $readcommand,subroutinereg +jmp displayhex + +pcirl: +movl $pcirl1, subroutinereg +jmp readnibbles +pcirl1: +mov resultreg,%eax +PCI_READ_CONFIG_DWORD +mov %eax,resultreg +mov $readcommand,subroutinereg +jmp displayhex + + + + +pciwb: +movl $pciwb1, subroutinereg +jmp readnibbles +pciwb1: +mov resultreg,%ebx +movl $pciwb2, subroutinereg +jmp readnibbles +pciwb2: +mov resultreg,%edx +mov %ebx,%eax +PCI_WRITE_CONFIG_BYTE +jmp readcommand + +pciww: +movl $pciww1, subroutinereg +jmp readnibbles +pciww1: +mov resultreg,%ebx +movl $pciww2, subroutinereg +jmp readnibbles +pciww2: +mov resultreg,%ecx +mov %ebx,%eax +PCI_WRITE_CONFIG_WORD +jmp readcommand + +pciwl: +movl $pciwl1, subroutinereg +jmp readnibbles +pciwl1: +mov resultreg,%ebx +movl $pciwl2, subroutinereg +jmp readnibbles +pciwl2: +mov resultreg,%ecx +mov %ebx,%eax +PCI_WRITE_CONFIG_DWORD +jmp readcommand + +cram: +//likely not working. Just testing for now +movl $cram1, subroutinereg +jmp readnibbles +cram1: +mov resultreg,%ebx +movl $cram1, subroutinereg +jmp readnibbles +cram2: +mov resultreg,%ecx +// enable it +mov %cr0,%eax +and $0x9fffffff,%eax // also try 0x0fff, 0x2ff(write back)... +mov %eax,%cr0 +//wbinvd ?? +cacheloop: +mov (%ebx),%eax +inc %ebx +loop cacheloop +// disable it +mov %cr0,%eax +or $0x60000000,%eax +mov %eax,%cr0 +//wbinvd ?? + +dodl: +movl $dl1, subroutinereg +jmp readnibbles +dl1: +mov resultreg,%ebx +movl $dl2, subroutinereg +jmp readnibbles +dl2: +mov resultreg,%ecx +mov resultreg,subroutinereg +mov %ebx,resultreg +dlloop: +mov UART_BASEADDR+5,%dx +in %dx, %al +and $0x9f,%al +test $0x01,%al +jz dlloop +mov UART_BASEADDR,%dx +in %dx,%al +mov %al,(%ebx) +inc %ebx +loop dlloop +csum: +mov subroutinereg,%ecx +shr $0x02,%ecx +mov resultreg,%ebx +mov $0x0,%eax +csumloop: +rol $0x03,%eax +mov (%ebx),%dl +xor %dl,%al +inc %ebx +loop csumloop +mov $readcommand,subroutinereg +mov %eax,resultreg +jmp displayhex + +baud: +mov $sorry,resultreg +mov $readcommand,subroutinereg +jmp displaystring + +mcp: +movl $mcp1, subroutinereg +jmp readnibbles +mcp1: +mov resultreg,%ebx +movl $mcp2, subroutinereg +jmp readnibbles +mcp2: +mov resultreg,%ecx +movl $mcp3, subroutinereg +jmp readnibbles +mcp3: +mov resultreg,%eax +xchg %ecx,%eax +mcploop: +mov (%ebx),%dl +mov %dl,(%eax) +inc %ebx +inc %eax +loop mcploop +jmp readcommand + +dopattern: +movl $pat1, subroutinereg +jmp readnibbles +pat1: +mov resultreg,%ebx +movl $pat2, subroutinereg +jmp readnibbles +pat2: +mov resultreg,%ecx +movl $pat3, subroutinereg +jmp readnibbles +pat3: +mov resultreg,%eax +xchg %ecx,%eax +patloop: +rol $0x08,%ebx +mov %bl,(%eax) +inc %eax +loop patloop +jmp readcommand + + +doexit: + // LB specific: +RETSP // if there's no stack yet, caller must set %esp manually +// RET_LABEL(low_level_shell) + + +//Linux OS Specific +ioperms: +movl $sys_IOPL, %eax # system-call ID-number +movl $3, %ebx # new value for IO0PL +int $0x80 # enter the kernel +ret + +llshell_out: diff --git a/src/arch/i386/llshell/readme.linuxbios b/src/arch/i386/llshell/readme.linuxbios new file mode 100644 index 0000000000..fb23d1a9d4 --- /dev/null +++ b/src/arch/i386/llshell/readme.linuxbios @@ -0,0 +1,25 @@ + +1) Include llshell.inc in your northbridge Config file +2) In raminit.inc (or whatever), make a jmp out to low_level_shell, setting + a return label in %esp. +For example: +ram_set_registers: + + mov $llshell_ret1,%esp + jmp low_level_shell +llshell_ret1: + + /* Disable and invalidate the cache */ + invd + mov %cr0, %eax + .... +3) Optionally, comment out two lines in ramtest.inc: +5: + CONSOLE_INFO_TX_STRING($rt_toomany) + // intel_chip_post_macro(0xf1) + // jmp .Lhlt +otherwise, a ramtest failure will hang + +4) build and flash as normal +If it worked, the speaker will beep, and you'll get a shell. +Type help or ? at the prompt for a list of commands. diff --git a/src/arch/ppc/init/ldscript.lb b/src/arch/ppc/init/ldscript.lb index a8ad86f1c0..63a32b735d 100644 --- a/src/arch/ppc/init/ldscript.lb +++ b/src/arch/ppc/init/ldscript.lb @@ -26,7 +26,7 @@ OUTPUT_FORMAT("elf32-powerpc") ENTRY(_start) TARGET(binary) -INPUT(linuxbios_payload) +INPUT(linuxbios_ram.rom) SECTIONS { /* @@ -63,7 +63,7 @@ SECTIONS *(.text); *(.rom.data); *(.rodata); - *(EXCLUDE_FILE(linuxbios_payload) .data); + *(EXCLUDE_FILE(linuxbios_ram.rom) .data); . = ALIGN(16); _erom = .; } @@ -71,21 +71,21 @@ SECTIONS _elrom = LOADADDR(.rom) + SIZEOF(.rom); /* - * Payload is LinuxBIOS proper. + * Ram is the LinuxBIOS code that runs from RAM. */ - .payload . : { - _payload = . ; - linuxbios_payload(*) - _epayload = . ; + .ram . : { + _ram = . ; + linuxbios_ram.rom(*) + _eram = . ; } /* - * Absolute location of where payload will be relocated in RAM. + * Absolute location of where LinuxBIOS will be relocated in RAM. */ _iseg = _RAMBASE; - _eiseg = _iseg + SIZEOF(.payload); - _liseg = _payload; - _eliseg = _epayload; + _eiseg = _iseg + SIZEOF(.ram); + _liseg = _ram; + _eliseg = _eram; /DISCARD/ : { *(.comment) diff --git a/src/config/Config.lb b/src/config/Config.lb index 70b3dc9630..c9c03bb604 100644 --- a/src/config/Config.lb +++ b/src/config/Config.lb @@ -32,40 +32,40 @@ makerule linuxbios.strip action "$(OBJCOPY) -O binary linuxbios linuxbios.strip" end -makerule linuxbios_c.o +makerule linuxbios_ram.o depends "$(DRIVER) linuxbios.a $(LIBGCC_FILE_NAME)" action "$(CC) -nostdlib -r -o $@ c_start.o $(DRIVER) linuxbios.a $(LIBGCC_FILE_NAME)" end -makerule linuxbios_c - depends "linuxbios_c.o $(TOP)/src/config/linuxbios_c.ld ldoptions" - action "$(CC) -nostdlib -nostartfiles -static -o $@ -T $(TOP)/src/config/linuxbios_c.ld linuxbios_c.o" - action "$(CROSS_COMPILE)nm -n linuxbios_c | sort > linuxbios_c.map" +makerule linuxbios_ram + depends "linuxbios_ram.o $(TOP)/src/config/linuxbios_ram.ld ldoptions" + action "$(CC) -nostdlib -nostartfiles -static -o $@ -T $(TOP)/src/config/linuxbios_ram.ld linuxbios_ram.o" + action "$(CROSS_COMPILE)nm -n linuxbios_ram | sort > linuxbios_ram.map" end ## -## By default compress the C part of linuxbios +## By default compress the part of linuxbios that runs from RAM ## -makedefine LINUXBIOS_PAYLOAD-$(CONFIG_COMPRESS):=linuxbios_payload.nrv2b -makedefine LINUXBIOS_PAYLOAD-$(CONFIG_UNCOMPRESSED):=linuxbios_payload.bin +makedefine LINUXBIOS_RAM-$(CONFIG_COMPRESS):=linuxbios_ram.nrv2b +makedefine LINUXBIOS_RAM-$(CONFIG_UNCOMPRESSED):=linuxbios_ram.bin -makerule linuxbios_payload.bin - depends "linuxbios_c" +makerule linuxbios_ram.bin + depends "linuxbios_ram" action "$(OBJCOPY) -O binary $< $@" end -makerule linuxbios_payload.nrv2b - depends "linuxbios_payload.bin nrv2b" +makerule linuxbios_ram.nrv2b + depends "linuxbios_ram.bin nrv2b" action "./nrv2b e $< $@" end -makerule linuxbios_payload - depends "$(LINUXBIOS_PAYLOAD-1)" - action "cp $(LINUXBIOS_PAYLOAD-1) linuxbios_payload" +makerule linuxbios_ram.rom + depends "$(LINUXBIOS_RAM-1)" + action "cp $(LINUXBIOS_RAM-1) linuxbios_ram.rom" end makerule linuxbios - depends "crt0.o $(INIT-OBJECTS) linuxbios_payload ldscript.ld" + depends "crt0.o $(INIT-OBJECTS) linuxbios_ram.rom ldscript.ld" action "$(CC) -nostdlib -nostartfiles -static -o $@ -T ldscript.ld crt0.o $(INIT-OBJECTS)" action "$(CROSS_COMPILE)nm -n linuxbios | sort > linuxbios.map" end @@ -155,7 +155,7 @@ makerule clean action "rm -f ldscript.ld" action "rm -f a.out *.s *.l *.o *.E *.inc" action "rm -f TAGS tags romcc" - action "rm -f docipl buildrom chips.c *chip.c linuxbios_c* linuxbios_pay*" + action "rm -f docipl buildrom chips.c *chip.c linuxbios_ram* linuxbios_pay*" action "rm -f build_opt_tbl option_table.c crt0.S" end diff --git a/src/config/Options.lb b/src/config/Options.lb index d3800976d4..eb6736f5de 100644 --- a/src/config/Options.lb +++ b/src/config/Options.lb @@ -61,35 +61,10 @@ define ARCH export always comment "Default architecture is i386, options are alpha and ppc" end -define k7 - default none - export used - comment "We're a k7" -end -define k8 - default none - export used - comment "We're a k8" -end -define i586 - default none - export used - comment "We're a 586" -end -define i686 - default none - export used - comment "We're a 686" -end -define i786 - default none - export used - comment "We're a 786" -end -define CPU_FIXUP - default none - export used - comment "Do CPU fixups" +define HAVE_MOVNTI + default 0 + export always + comment "This cpu supports the MOVNTI directive" end ############################################### @@ -702,6 +677,12 @@ end # Misc options ############################################### +define CONFIG_GDB_STUB + default 0 + export used + comment "Compile in gdb stub support?" +end + define HAVE_INIT_TIMER default 0 export always diff --git a/src/config/linuxbios_c.ld b/src/config/linuxbios_ram.ld index 6fa311fc0e..6fa311fc0e 100644 --- a/src/config/linuxbios_c.ld +++ b/src/config/linuxbios_ram.ld diff --git a/src/cpu/amd/model_fxx/Config.lb b/src/cpu/amd/model_fxx/Config.lb index 044fe8670f..bf7b9987cc 100644 --- a/src/cpu/amd/model_fxx/Config.lb +++ b/src/cpu/amd/model_fxx/Config.lb @@ -1,5 +1,7 @@ uses HAVE_INIT_TIMER +uses HAVE_MOVNTI default HAVE_INIT_TIMER=1 +default HAVE_MOVNTI=1 dir /cpu/x86/tsc dir /cpu/x86/fpu dir /cpu/x86/mmx diff --git a/src/cpu/amd/mtrr/amd_mtrr.c b/src/cpu/amd/mtrr/amd_mtrr.c index 0247fd00d3..506e017457 100644 --- a/src/cpu/amd/mtrr/amd_mtrr.c +++ b/src/cpu/amd/mtrr/amd_mtrr.c @@ -75,13 +75,41 @@ static void set_fixed_mtrrs(unsigned int first, unsigned int last, unsigned char } } +struct mem_state { + unsigned long mmio_basek, tomk; +}; +static void set_fixed_mtrr_resource(void *gp, struct device *dev, struct resource *res) +{ + struct mem_state *state = gp; + unsigned long topk; + unsigned int start_mtrr; + unsigned int last_mtrr; + + topk = resk(res->base + res->size); + if (state->tomk < topk) { + state->tomk = topk; + } + if ((topk < 4*1024*1024) && (state->mmio_basek < topk)) { + state->mmio_basek = topk; + } + start_mtrr = fixed_mtrr_index(resk(res->base)); + last_mtrr = fixed_mtrr_index(resk((res->base + res->size))); + if (start_mtrr >= NUM_FIXED_RANGES) { + return; + } + printk_debug("Setting fixed MTRRs(%d-%d) Type: WB\n", + start_mtrr, last_mtrr); + set_fixed_mtrrs(start_mtrr, last_mtrr, MTRR_TYPE_WRBACK | MTRR_READ_MEM | MTRR_WRITE_MEM); + +} + + #endif void amd_setup_mtrrs(void) { - unsigned long mmio_basek, tomk; + struct mem_state state; unsigned long i; - device_t dev; msr_t msr; /* Enable the access to AMD RdDram and WrDram extension bits */ @@ -99,54 +127,29 @@ void amd_setup_mtrrs(void) * significant holes in the address space, so just account * for those two and move on. */ - mmio_basek = tomk = 0; - for(dev = all_devices; dev; dev = dev->next) { - struct resource *res, *last; - last = &dev->resource[dev->resources]; - for(res = &dev->resource[0]; res < last; res++) { - unsigned long topk; - unsigned long start_mtrr, last_mtrr; - if (!(res->flags & IORESOURCE_MEM) || - (!(res->flags & IORESOURCE_CACHEABLE))) { - continue; - } - topk = resk(res->base + res->size); - if (tomk < topk) { - tomk = topk; - } - if ((topk < 4*1024*1024) && (mmio_basek < topk)) { - mmio_basek = topk; - } - - start_mtrr = fixed_mtrr_index(resk(res->base)); - last_mtrr = fixed_mtrr_index(resk(res->base + res->size)); - if (start_mtrr >= NUM_FIXED_RANGES) { - continue; - } - printk_debug("Setting fixed MTRRs(%d-%d) Type: WB\n", - start_mtrr, last_mtrr); - set_fixed_mtrrs(start_mtrr, last_mtrr, MTRR_TYPE_WRBACK | MTRR_READ_MEM | MTRR_WRITE_MEM); - } - } + state.mmio_basek = state.tomk = 0; + search_global_resources( + IORESOURCE_MEM | IORESOURCE_CACHEABLE, IORESOURCE_MEM | IORESOURCE_CACHEABLE, + set_fixed_mtrr_resource, &state); printk_debug("DONE fixed MTRRs\n"); - if (mmio_basek > tomk) { - mmio_basek = tomk; + if (state.mmio_basek > state.tomk) { + state.mmio_basek = state.tomk; } - /* Round mmio_basek down to the nearst size that will fit in TOP_MEM */ - mmio_basek = mmio_basek & ~TOP_MEM_MASK_KB; - /* Round tomk up to the next greater size that will fit in TOP_MEM */ - tomk = (tomk + TOP_MEM_MASK_KB) & ~TOP_MEM_MASK_KB; + /* Round state.mmio_basek down to the nearst size that will fit in TOP_MEM */ + state.mmio_basek = state.mmio_basek & ~TOP_MEM_MASK_KB; + /* Round state.tomk up to the next greater size that will fit in TOP_MEM */ + state.tomk = (state.tomk + TOP_MEM_MASK_KB) & ~TOP_MEM_MASK_KB; disable_cache(); /* Setup TOP_MEM */ - msr.hi = mmio_basek >> 22; - msr.lo = mmio_basek << 10; + msr.hi = state.mmio_basek >> 22; + msr.lo = state.mmio_basek << 10; wrmsr(TOP_MEM, msr); /* Setup TOP_MEM2 */ - msr.hi = tomk >> 22; - msr.lo = tomk << 10; + msr.hi = state.tomk >> 22; + msr.lo = state.tomk << 10; wrmsr(TOP_MEM2, msr); /* zero the IORR's before we enable to prevent diff --git a/src/cpu/amd/socket_940/Config.lb b/src/cpu/amd/socket_940/Config.lb index 9f0e6c689a..4b23f0b46a 100644 --- a/src/cpu/amd/socket_940/Config.lb +++ b/src/cpu/amd/socket_940/Config.lb @@ -1,3 +1,3 @@ -config chip.h -object socket_940.o +#config chip.h +#object socket_940.o dir /cpu/amd/model_fxx diff --git a/src/cpu/amd/socket_940/socket_940.c b/src/cpu/amd/socket_940/socket_940.c index d62834f4e7..46d0cbd449 100644 --- a/src/cpu/amd/socket_940/socket_940.c +++ b/src/cpu/amd/socket_940/socket_940.c @@ -3,5 +3,4 @@ struct chip_operations cpu_amd_socket_940_ops = { - .name = "socket 940", }; diff --git a/src/cpu/intel/model_f0x/Config.lb b/src/cpu/intel/model_f0x/Config.lb index 1e6126c3cc..2458c81c14 100644 --- a/src/cpu/intel/model_f0x/Config.lb +++ b/src/cpu/intel/model_f0x/Config.lb @@ -1,3 +1,5 @@ +uses HAVE_MOVNTI +default HAVE_MOVNTI=1 dir /cpu/x86/tsc dir /cpu/x86/mtrr dir /cpu/x86/fpu diff --git a/src/cpu/intel/model_f1x/Config.lb b/src/cpu/intel/model_f1x/Config.lb index d318ee538d..5387d455f1 100644 --- a/src/cpu/intel/model_f1x/Config.lb +++ b/src/cpu/intel/model_f1x/Config.lb @@ -1,3 +1,5 @@ +uses HAVE_MOVNTI +default HAVE_MOVNTI=1 dir /cpu/x86/tsc dir /cpu/x86/mtrr dir /cpu/x86/fpu diff --git a/src/cpu/intel/model_f2x/Config.lb b/src/cpu/intel/model_f2x/Config.lb index 10fe8b767b..ef9d095ac5 100644 --- a/src/cpu/intel/model_f2x/Config.lb +++ b/src/cpu/intel/model_f2x/Config.lb @@ -1,3 +1,5 @@ +uses HAVE_MOVNTI +default HAVE_MOVNTI=1 dir /cpu/x86/tsc dir /cpu/x86/mtrr dir /cpu/x86/fpu diff --git a/src/cpu/intel/model_f3x/Config.lb b/src/cpu/intel/model_f3x/Config.lb index dc58d7df50..175ff58919 100644 --- a/src/cpu/intel/model_f3x/Config.lb +++ b/src/cpu/intel/model_f3x/Config.lb @@ -1,3 +1,5 @@ +uses HAVE_MOVNTI +default HAVE_MOVNTI=1 dir /cpu/x86/tsc dir /cpu/x86/mtrr dir /cpu/x86/fpu diff --git a/src/cpu/x86/16bit/reset16.inc b/src/cpu/x86/16bit/reset16.inc index d36c94085e..1be0e3a94c 100644 --- a/src/cpu/x86/16bit/reset16.inc +++ b/src/cpu/x86/16bit/reset16.inc @@ -2,8 +2,6 @@ .code16 .globl reset_vector reset_vector: -#if _ROMBASE >= 0xffff0000 - /* jmp _start */ .byte 0xe9 .int _start - ( . + 2 ) /* Note: The above jump is hand coded to work around bugs in binutils. @@ -12,9 +10,6 @@ reset_vector: * instead of the weird 16 bit relocations that binutils does not * handle consistenly between versions because they are used so rarely. */ -#else -# error _ROMBASE is an unsupported value -#endif . = 0x8; .code32 jmp protected_start diff --git a/src/cpu/x86/16bit/reset16.lds b/src/cpu/x86/16bit/reset16.lds index 80f2fc0c6f..d01f094b3c 100644 --- a/src/cpu/x86/16bit/reset16.lds +++ b/src/cpu/x86/16bit/reset16.lds @@ -4,7 +4,8 @@ */ SECTIONS { - _ROMTOP = (_ROMBASE >= 0xffff0000)? 0xfffffff0 : 0xffff0; + /* Trigger an error if I have an unuseable start address */ + _ROMTOP = (_start >= 0xffff0000) ? 0xfffffff0 : 0xffffffff8; . = _ROMTOP; .reset . : { *(.reset) @@ -12,3 +13,4 @@ SECTIONS { BYTE(0x00); } } + diff --git a/src/cpu/x86/lapic/secondary.S b/src/cpu/x86/lapic/secondary.S index 786c31e532..5185021c3c 100644 --- a/src/cpu/x86/lapic/secondary.S +++ b/src/cpu/x86/lapic/secondary.S @@ -36,6 +36,9 @@ _secondary_start: movw %ax, %fs movw %ax, %gs + /* Load the Interrupt descriptor table */ + lidt idtarg + /* Set the stack pointer, and flag that we are done */ xorl %eax, %eax movl secondary_stack, %esp diff --git a/src/cpu/x86/mtrr/earlymtrr.c b/src/cpu/x86/mtrr/earlymtrr.c index e8fda994af..74e0a64dce 100644 --- a/src/cpu/x86/mtrr/earlymtrr.c +++ b/src/cpu/x86/mtrr/earlymtrr.c @@ -6,20 +6,26 @@ /* Validate XIP_ROM_SIZE and XIP_ROM_BASE */ #if defined(XIP_ROM_SIZE) && !defined(XIP_ROM_BASE) -#error "XIP_ROM_SIZE without XIP_ROM_BASE" +# error "XIP_ROM_SIZE without XIP_ROM_BASE" #endif #if defined(XIP_ROM_BASE) && !defined(XIP_ROM_SIZE) -#error "XIP_ROM_BASE without XIP_ROM_SIZE" +# error "XIP_ROM_BASE without XIP_ROM_SIZE" #endif #if !defined(CONFIG_LB_MEM_TOPK) -#error "CONFIG_LB_MEM_TOPK not defined" +# error "CONFIG_LB_MEM_TOPK not defined" #endif -#if defined(XIP_ROM_SIZE) && ((XIP_ROM_SIZE & (XIP_ROM_SIZE -1)) != 0) -#error "XIP_ROM_SIZE is not a power of 2" -#endif -#if defined(XIP_ROM_SIZE) && ((XIP_ROM_BASE % XIP_ROM_SIZE) != 0) -#error "XIP_ROM_BASE is not a multiple of XIP_ROM_SIZE" +#if __ROMCC__ == 0 && __ROMCC_MINOR__ <= 64 + +#warning "Not checking if XIP_ROM_SIZE is valid to avoid romcc preprocessor deficiency" + +#else +# if defined(XIP_ROM_SIZE) && ((XIP_ROM_SIZE & (XIP_ROM_SIZE -1)) != 0) +# error "XIP_ROM_SIZE is not a power of 2" +# endif +# if defined(XIP_ROM_SIZE) && ((XIP_ROM_BASE % XIP_ROM_SIZE) != 0) +# error "XIP_ROM_BASE is not a multiple of XIP_ROM_SIZE" +# endif #endif #if (CONFIG_LB_MEM_TOPK & (CONFIG_LB_MEM_TOPK -1)) != 0 diff --git a/src/cpu/x86/mtrr/mtrr.c b/src/cpu/x86/mtrr/mtrr.c index 5ffaaf053f..dcf9f008e2 100644 --- a/src/cpu/x86/mtrr/mtrr.c +++ b/src/cpu/x86/mtrr/mtrr.c @@ -23,6 +23,7 @@ * Reference: Intel Architecture Software Developer's Manual, Volume 3: System Programming */ +#include <stddef.h> #include <console/console.h> #include <device/device.h> #include <cpu/x86/msr.h> @@ -250,15 +251,61 @@ static unsigned long resk(uint64_t value) return resultk; } +static void set_fixed_mtrr_resource(void *gp, struct device *dev, struct resource *res) +{ + unsigned int start_mtrr; + unsigned int last_mtrr; + start_mtrr = fixed_mtrr_index(resk(res->base)); + last_mtrr = fixed_mtrr_index(resk((res->base + res->size))); + if (start_mtrr >= NUM_FIXED_RANGES) { + return; + } + printk_debug("Setting fixed MTRRs(%d-%d) Type: WB\n", + start_mtrr, last_mtrr); + set_fixed_mtrrs(start_mtrr, last_mtrr, MTRR_TYPE_WRBACK); + +} + +struct var_mtrr_state { + unsigned long range_startk, range_sizek; + unsigned int reg; +}; + +void set_var_mtrr_resource(void *gp, struct device *dev, struct resource *res) +{ + struct var_mtrr_state *state = gp; + unsigned long basek, sizek; + if (state->reg >= BIOS_MTRRS) + return; + basek = resk(res->base); + sizek = resk(res->size); + /* See if I can merge with the last range + * Either I am below 1M and the fixed mtrrs handle it, or + * the ranges touch. + */ + if ((basek <= 1024) || (state->range_startk + state->range_sizek == basek)) { + unsigned long endk = basek + sizek; + state->range_sizek = endk - state->range_startk; + return; + } + /* Write the range mtrrs */ + if (state->range_sizek != 0) { + state->reg = range_to_mtrr(state->reg, state->range_startk, state->range_sizek, basek); + state->range_startk = 0; + state->range_sizek = 0; + } + /* Allocate an msr */ + state->range_startk = basek; + state->range_sizek = sizek; +} + void x86_setup_mtrrs(void) { /* Try this the simple way of incrementally adding together * mtrrs. If this doesn't work out we can get smart again * and clear out the mtrrs. */ - struct device *dev; - unsigned long range_startk, range_sizek; - unsigned int reg; + struct var_mtrr_state var_state; printk_debug("\n"); /* Initialized the fixed_mtrrs to uncached */ @@ -268,76 +315,29 @@ void x86_setup_mtrrs(void) /* Now see which of the fixed mtrrs cover ram. */ - for(dev = all_devices; dev; dev = dev->next) { - struct resource *res, *last; - last = &dev->resource[dev->resources]; - for(res = &dev->resource[0]; res < last; res++) { - unsigned int start_mtrr; - unsigned int last_mtrr; - if (!(res->flags & IORESOURCE_MEM) || - !(res->flags & IORESOURCE_CACHEABLE)) - { - continue; - } - start_mtrr = fixed_mtrr_index(resk(res->base)); - last_mtrr = fixed_mtrr_index(resk((res->base + res->size))); - if (start_mtrr >= NUM_FIXED_RANGES) { - continue; - } - printk_debug("Setting fixed MTRRs(%d-%d) Type: WB\n", - start_mtrr, last_mtrr); - set_fixed_mtrrs(start_mtrr, last_mtrr, MTRR_TYPE_WRBACK); - } - } + search_global_resources( + IORESOURCE_MEM | IORESOURCE_CACHEABLE, IORESOURCE_MEM | IORESOURCE_CACHEABLE, + set_fixed_mtrr_resource, NULL); printk_debug("DONE fixed MTRRs\n"); + /* Cache as many memory areas as possible */ /* FIXME is there an algorithm for computing the optimal set of mtrrs? * In some cases it is definitely possible to do better. */ - range_startk = 0; - range_sizek = 0; - reg = 0; - for(dev = all_devices; dev; dev = dev->next) { - struct resource *res, *last; - last = &dev->resource[dev->resources]; - for(res = &dev->resource[0]; res < last; res++) { - unsigned long basek, sizek; - if (!(res->flags & IORESOURCE_MEM) || - !(res->flags & IORESOURCE_CACHEABLE)) { - continue; - } - basek = resk(res->base); - sizek = resk(res->size); - /* See if I can merge with the last range - * Either I am below 1M and the fixed mtrrs handle it, or - * the ranges touch. - */ - if ((basek <= 1024) || (range_startk + range_sizek == basek)) { - unsigned long endk = basek + sizek; - range_sizek = endk - range_startk; - continue; - } - /* Write the range mtrrs */ - if (range_sizek != 0) { - reg = range_to_mtrr(reg, range_startk, range_sizek, basek); - range_startk = 0; - range_sizek = 0; - if (reg >= BIOS_MTRRS) - goto last_msr; - } - /* Allocate an msr */ - range_startk = basek; - range_sizek = sizek; - } - } + var_state.range_startk = 0; + var_state.range_sizek = 0; + var_state.reg = 0; + search_global_resources( + IORESOURCE_MEM | IORESOURCE_CACHEABLE, IORESOURCE_MEM | IORESOURCE_CACHEABLE, + set_var_mtrr_resource, &var_state); last_msr: /* Write the last range */ - reg = range_to_mtrr(reg, range_startk, range_sizek, 0); + var_state.reg = range_to_mtrr(var_state.reg, var_state.range_startk, var_state.range_sizek, 0); printk_debug("DONE variable MTRRs\n"); printk_debug("Clear out the extra MTRR's\n"); /* Clear out the extra MTRR's */ - while(reg < MTRRS) { - set_var_mtrr(reg++, 0, 0, 0); + while(var_state.reg < MTRRS) { + set_var_mtrr(var_state.reg++, 0, 0, 0); } /* enable fixed MTRR */ printk_spew("call enable_fixed_mtrr()\n"); diff --git a/src/devices/device.c b/src/devices/device.c index 96559c5833..033f41d2ca 100644 --- a/src/devices/device.c +++ b/src/devices/device.c @@ -169,9 +169,10 @@ struct pick_largest_state { int seen_last; }; -static void pick_largest_resource(struct pick_largest_state *state, +static void pick_largest_resource(void *gp, struct device *dev, struct resource *resource) { + struct pick_largest_state *state = gp; struct resource *last; last = state->last; /* Be certain to pick the successor to last */ @@ -197,33 +198,6 @@ static void pick_largest_resource(struct pick_largest_state *state, } } -static void find_largest_resource(struct pick_largest_state *state, - struct bus *bus, unsigned long type_mask, unsigned long type) -{ - struct device *curdev; - for(curdev = bus->children; curdev; curdev = curdev->sibling) { - int i; - /* Ignore disabled devices */ - if (!curdev->have_resources) continue; - for(i = 0; i < curdev->resources; i++) { - struct resource *resource = &curdev->resource[i]; - /* If it isn't the right kind of resource ignore it */ - if ((resource->flags & type_mask) != type) { - continue; - } - /* If it is a subtractive resource recurse */ - if (resource->flags & IORESOURCE_SUBTRACTIVE) { - struct bus *subbus; - subbus = &curdev->link[resource->index]; - find_largest_resource(state, subbus, type_mask, type); - continue; - } - /* See if this is the largest resource */ - pick_largest_resource(state, curdev, resource); - } - } -} - static struct device *largest_resource(struct bus *bus, struct resource **result_res, unsigned long type_mask, unsigned long type) { @@ -234,7 +208,7 @@ static struct device *largest_resource(struct bus *bus, struct resource **result state.result = 0; state.seen_last = 0; - find_largest_resource(&state, bus, type_mask, type); + search_bus_resources(bus, type_mask, type, pick_largest_resource, &state); *result_res = state.result; return state.result_dev; @@ -282,7 +256,7 @@ void compute_allocate_resource( min_align = 0; base = bridge->base; - printk_spew("%s compute_allocate_%s: base: %08lx size: %08lx align: %d gran: %d\n", + printk_spew("%s compute_allocate_%s: base: %08Lx size: %08Lx align: %d gran: %d\n", dev_path(bus->dev), (bridge->flags & IORESOURCE_IO)? "io": (bridge->flags & IORESOURCE_PREFETCH)? "prefmem" : "mem", @@ -383,7 +357,7 @@ void compute_allocate_resource( */ bridge->size = round(base, bridge->gran) - bridge->base; - printk_spew("%s compute_allocate_%s: base: %08lx size: %08lx align: %d gran: %d done\n", + printk_spew("%s compute_allocate_%s: base: %08Lx size: %08Lx align: %d gran: %d done\n", dev_path(bus->dev), (bridge->flags & IORESOURCE_IO)? "io": (bridge->flags & IORESOURCE_PREFETCH)? "prefmem" : "mem", diff --git a/src/devices/device_util.c b/src/devices/device_util.c index 56a96015b8..fd8fdcf9b8 100644 --- a/src/devices/device_util.c +++ b/src/devices/device_util.c @@ -2,6 +2,7 @@ #include <device/device.h> #include <device/path.h> #include <device/pci.h> +#include <device/resource.h> #include <string.h> /** @@ -388,3 +389,54 @@ void report_resource_stored(device_t dev, struct resource *resource, const char comment); } } + +void search_bus_resources(struct bus *bus, + unsigned long type_mask, unsigned long type, + resource_search_t search, void *gp) +{ + struct device *curdev; + for(curdev = bus->children; curdev; curdev = curdev->sibling) { + int i; + /* Ignore disabled devices */ + if (!curdev->have_resources) continue; + for(i = 0; i < curdev->resources; i++) { + struct resource *resource = &curdev->resource[i]; + /* If it isn't the right kind of resource ignore it */ + if ((resource->flags & type_mask) != type) { + continue; + } + /* If it is a subtractive resource recurse */ + if (resource->flags & IORESOURCE_SUBTRACTIVE) { + struct bus * subbus; + subbus = &curdev->link[IOINDEX_SUBTRACTIVE_LINK(resource->index)]; + search_bus_resources(subbus, type_mask, type, search, gp); + continue; + } + search(gp, curdev, resource); + } + } +} + +void search_global_resources( + unsigned long type_mask, unsigned long type, + resource_search_t search, void *gp) +{ + struct device *curdev; + for(curdev = all_devices; curdev; curdev = curdev->next) { + int i; + /* Ignore disabled devices */ + if (!curdev->have_resources) continue; + for(i = 0; i < curdev->resources; i++) { + struct resource *resource = &curdev->resource[i]; + /* If it isn't the right kind of resource ignore it */ + if ((resource->flags & type_mask) != type) { + continue; + } + /* If it is a subtractive resource ignore it */ + if (resource->flags & IORESOURCE_SUBTRACTIVE) { + continue; + } + search(gp, curdev, resource); + } + } +} diff --git a/src/devices/root_device.c b/src/devices/root_device.c index 95189e0241..897a5a3bbf 100644 --- a/src/devices/root_device.c +++ b/src/devices/root_device.c @@ -72,7 +72,7 @@ unsigned int scan_static_bus(device_t bus, unsigned int max) device_t child; unsigned link; - printk_debug("%s for %s\n", __func__, dev_path(bus)); + printk_spew("%s for %s\n", __func__, dev_path(bus)); for(link = 0; link < bus->links; link++) { for(child = bus->link[link].children; child; child = child->sibling) { @@ -91,12 +91,12 @@ unsigned int scan_static_bus(device_t bus, unsigned int max) for(child = bus->link[link].children; child; child = child->sibling) { if (!child->ops || !child->ops->scan_bus) continue; - printk_debug("%s scanning...\n", dev_path(child)); + printk_spew("%s scanning...\n", dev_path(child)); max = child->ops->scan_bus(child, max); } } - printk_debug("%s done\n", __func__); + printk_spew("%s done\n", __func__); return max; } diff --git a/src/include/delay.h b/src/include/delay.h index 57bff0b637..0ffad4e611 100644 --- a/src/include/delay.h +++ b/src/include/delay.h @@ -2,7 +2,6 @@ #define DELAY_H #ifndef __ROMCC__ -void init_timer(void); void udelay(unsigned usecs); void mdelay(unsigned msecs); void delay(unsigned secs); diff --git a/src/include/device/device.h b/src/include/device/device.h index 2691e4e21c..cd232c72c1 100644 --- a/src/include/device/device.h +++ b/src/include/device/device.h @@ -13,7 +13,6 @@ struct smbus_bus_operations; /* Chip operations */ struct chip_operations { - char *name; /* This is the print name for debugging */ void (*enable_dev)(struct device *dev); }; diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 808b5cd2c6..f4b0109c49 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -290,8 +290,15 @@ #define PCI_DEVICE_ID_NS_87560_USB 0x0012 #define PCI_DEVICE_ID_NS_83815 0x0020 #define PCI_DEVICE_ID_NS_83820 0x0022 +#define PCI_DEVICE_ID_NS_SCx200_BRIDGE 0x0500 +#define PCI_DEVICE_ID_NS_SCx200_SMI 0x0501 +#define PCI_DEVICE_ID_NS_SCx200_IDE 0x0502 +#define PCI_DEVICE_ID_NS_SCx200_AUDIO 0x0503 +#define PCI_DEVICE_ID_NS_SCx200_VIDEO 0x0504 +#define PCI_DEVICE_ID_NS_SCx200_XBUS 0x0505 #define PCI_DEVICE_ID_NS_87410 0xd001 + #define PCI_VENDOR_ID_TSENG 0x100c #define PCI_DEVICE_ID_TSENG_W32P_2 0x3202 #define PCI_DEVICE_ID_TSENG_W32P_b 0x3205 @@ -990,6 +997,7 @@ #define PCI_DEVICE_ID_VIA_82C693_1 0x0698 #define PCI_DEVICE_ID_VIA_82C926 0x0926 #define PCI_DEVICE_ID_VIA_82C576_1 0x1571 +#define PCI_DEVICE_ID_VIA_82C416 0x1571 #define PCI_DEVICE_ID_VIA_82C595_97 0x1595 #define PCI_DEVICE_ID_VIA_82C586_2 0x3038 #define PCI_DEVICE_ID_VIA_82C586_3 0x3040 @@ -1795,7 +1803,32 @@ #define PCI_DEVICE_ID_INTEL_82454GX 0x84c4 #define PCI_DEVICE_ID_INTEL_82450GX 0x84c5 #define PCI_DEVICE_ID_INTEL_82451NX 0x84ca +#define PCI_DEVICE_ID_INTEL_82454NX 0x84cb + +#define PCI_DEVICE_ID_INTEL_82801DBM_1E0 0x2448 +#define PCI_DEVICE_ID_INTEL_82801DBM_1F0 0x24cc +#define PCI_DEVICE_ID_INTEL_82801DBM_1F1 0x24ca +#define PCI_DEVICE_ID_INTEL_82801DBM_1F3 0x24c3 +#define PCI_DEVICE_ID_INTEL_82801DBM_1F5 0x24c5 +#define PCI_DEVICE_ID_INTEL_82801DBM_1F6 0x24c6 +#define PCI_DEVICE_ID_INTEL_82801DBM_1D0 0x24c2 +#define PCI_DEVICE_ID_INTEL_82801DBM_1D1 0x24c4 +#define PCI_DEVICE_ID_INTEL_82801DBM_1D2 0x24c7 +#define PCI_DEVICE_ID_INTEL_82801DBM_1D7 0x24cd +#define PCI_DEVICE_ID_INTEL_82801ER_1E0 0x244e +#define PCI_DEVICE_ID_INTEL_82801ER_1F0 0x24d0 +#define PCI_DEVICE_ID_INTEL_82801ER_1F1 0x24db +#define PCI_DEVICE_ID_INTEL_82801ER_1F2 0x24d1 +#define PCI_DEVICE_ID_INTEL_82801ER_1F2_R 0x24df +#define PCI_DEVICE_ID_INTEL_82801ER_1F3 0x24d3 +#define PCI_DEVICE_ID_INTEL_82801ER_1F5 0x24d5 +#define PCI_DEVICE_ID_INTEL_82801ER_1F6 0x24d6 +#define PCI_DEVICE_ID_INTEL_82801ER_1D0 0x24d2 +#define PCI_DEVICE_ID_INTEL_82801ER_1D1 0x24d4 +#define PCI_DEVICE_ID_INTEL_82801ER_1D2 0x24d7 +#define PCI_DEVICE_ID_INTEL_82801ER_1D3 0x24de +#define PCI_DEVICE_ID_INTEL_82801ER_1D7 0x24dd #define PCI_VENDOR_ID_COMPUTONE 0x8e0e #define PCI_DEVICE_ID_COMPUTONE_IP2EX 0x0291 @@ -1888,53 +1921,4 @@ #define PCI_DEVICE_ID_AMD_761_1 0x700F #define PCI_DEVICE_ID_AMD_VIPER_7412 0x7412 -#define PCI_DEVICE_ID_NS_SCx200_BRIDGE 0x0500 -#define PCI_DEVICE_ID_NS_83815 0x0020 -#define PCI_DEVICE_ID_NS_SCx200_SMI 0x0501 -#define PCI_DEVICE_ID_NS_83820 0x0022 -#define PCI_DEVICE_ID_NS_SCx200_IDE 0x0502 -#define PCI_DEVICE_ID_NS_SCx200_AUDIO 0x0503 -#define PCI_DEVICE_ID_NS_SCx200_VIDEO 0x0504 -#define PCI_DEVICE_ID_NS_SCx200_XBUS 0x0505 - -#define PCI_DEVICE_ID_INTEL_82454NX 0x84cb -#define PCI_DEVICE_ID_INTEL_82801CA_1E0 0x244e -#define PCI_DEVICE_ID_INTEL_82801CA_1F0 0x2480 -#define PCI_DEVICE_ID_INTEL_82801CA_1F1 0x248b -#define PCI_DEVICE_ID_INTEL_82801CA_1D0 0x2482 -#define PCI_DEVICE_ID_INTEL_82801CA_1F3 0x2483 -#define PCI_DEVICE_ID_INTEL_82801CA_1D1 0x2484 -#define PCI_DEVICE_ID_INTEL_82801CA_1F5 0x2485 -#define PCI_DEVICE_ID_INTEL_82801CA_1D2 0x2487 - -#define PCI_DEVICE_ID_INTEL_82801DBM_1E0 0x2448 -#define PCI_DEVICE_ID_INTEL_82801DBM_1F0 0x24cc -#define PCI_DEVICE_ID_INTEL_82801DBM_1F1 0x24ca -#define PCI_DEVICE_ID_INTEL_82801DBM_1F3 0x24c3 -#define PCI_DEVICE_ID_INTEL_82801DBM_1F5 0x24c5 -#define PCI_DEVICE_ID_INTEL_82801DBM_1F6 0x24c6 -#define PCI_DEVICE_ID_INTEL_82801DBM_1D0 0x24c2 -#define PCI_DEVICE_ID_INTEL_82801DBM_1D1 0x24c4 -#define PCI_DEVICE_ID_INTEL_82801DBM_1D2 0x24c7 -#define PCI_DEVICE_ID_INTEL_82801DBM_1D7 0x24cd - -#define PCI_DEVICE_ID_INTEL_82801ER_1E0 0x244e -#define PCI_DEVICE_ID_INTEL_82801ER_1F0 0x24d0 -#define PCI_DEVICE_ID_INTEL_82801ER_1F1 0x24db -#define PCI_DEVICE_ID_INTEL_82801ER_1F2 0x24d1 -#define PCI_DEVICE_ID_INTEL_82801ER_1F2_R 0x24df -#define PCI_DEVICE_ID_INTEL_82801ER_1F3 0x24d3 -#define PCI_DEVICE_ID_INTEL_82801ER_1F5 0x24d5 -#define PCI_DEVICE_ID_INTEL_82801ER_1F6 0x24d6 -#define PCI_DEVICE_ID_INTEL_82801ER_1D0 0x24d2 -#define PCI_DEVICE_ID_INTEL_82801ER_1D1 0x24d4 -#define PCI_DEVICE_ID_INTEL_82801ER_1D2 0x24d7 -#define PCI_DEVICE_ID_INTEL_82801ER_1D3 0x24de -#define PCI_DEVICE_ID_INTEL_82801ER_1D7 0x24dd - -#define PCI_DEVICE_ID_INTEL_82870_1E0 0x1461 -#define PCI_DEVICE_ID_INTEL_82870_1F0 0x1460 - -#define PCI_DEVICE_ID_VIA_8601_0 0x0601 -#define PCI_DEVICE_ID_VIA_82C416 0x1571 /* END OLDER USAGE */ diff --git a/src/include/device/resource.h b/src/include/device/resource.h index 7ab8065c23..a5c7f0a31a 100644 --- a/src/include/device/resource.h +++ b/src/include/device/resource.h @@ -80,6 +80,7 @@ struct resource { /* Generic resource helper functions */ struct device; +struct bus; extern void compact_resources(struct device * dev); extern struct resource *probe_resource(struct device *dev, unsigned index); extern struct resource *new_resource(struct device * dev, unsigned index); @@ -88,4 +89,13 @@ extern resource_t resource_end(struct resource *resource); extern resource_t resource_max(struct resource *resource); extern void report_resource_stored(struct device * dev, struct resource *resource, const char *comment); +typedef void (*resource_search_t)(void *gp, struct device *dev, struct resource *res); +extern void search_bus_resources(struct bus *bus, + unsigned long type_mask, unsigned long type, + resource_search_t search, void *gp); + +extern void search_global_resources( + unsigned long type_mask, unsigned long type, + resource_search_t search, void *gp); + #endif /* RESOURCE_H */ diff --git a/src/mainboard/arima/hdama/Config.lb b/src/mainboard/arima/hdama/Config.lb index 432542e3ca..0799be0117 100644 --- a/src/mainboard/arima/hdama/Config.lb +++ b/src/mainboard/arima/hdama/Config.lb @@ -47,22 +47,22 @@ if HAVE_PIRQ_TABLE object irq_tables.o end ## Romcc output ## makerule ./failover.E - depends "$(MAINBOARD)/failover.c" - action "$(CPP) -I$(TOP)/src $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/failover.c > ./failover.E" + depends "$(MAINBOARD)/failover.c ./romcc" + action "./romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@" end makerule ./failover.inc - depends "./failover.E ./romcc" - action "./romcc -O -o failover.inc --label-prefix=failover ./failover.E" + depends "$(MAINBOARD)/failover.c ./romcc" + action "./romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@" end makerule ./auto.E - depends "$(MAINBOARD)/auto.c option_table.h " - action "$(CPP) -I$(TOP)/src -I. $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/auto.c > ./auto.E" + depends "$(MAINBOARD)/auto.c option_table.h ./romcc" + action "./romcc -E -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" end makerule ./auto.inc - depends "./auto.E ./romcc" - action "./romcc -mcpu=k8 -O2 ./auto.E > auto.inc" + depends "$(MAINBOARD)/auto.c option_table.h ./romcc" + action "./romcc -mcpu=k8 -O2 -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" end ## diff --git a/src/mainboard/arima/hdama/Options.lb b/src/mainboard/arima/hdama/Options.lb index 2f2df1c8ec..8eb01b384d 100644 --- a/src/mainboard/arima/hdama/Options.lb +++ b/src/mainboard/arima/hdama/Options.lb @@ -46,6 +46,7 @@ uses MAXIMUM_CONSOLE_LOGLEVEL uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL uses CONFIG_CONSOLE_SERIAL8250 uses HAVE_INIT_TIMER +uses CONFIG_GDB_STUB ### ### Build options @@ -166,6 +167,11 @@ default CC="gcc" default HOSTCC="gcc" ## +## Disable the gdb stub by default +## +default CONFIG_GDB_STUB=0 + +## ## The Serial Console ## diff --git a/src/mainboard/arima/hdama/mainboard.c b/src/mainboard/arima/hdama/mainboard.c index 8af64d9091..95ed7368f9 100644 --- a/src/mainboard/arima/hdama/mainboard.c +++ b/src/mainboard/arima/hdama/mainboard.c @@ -316,7 +316,6 @@ static void enable_dev(struct device *dev) dev->ops = &mainboard_operations; } struct chip_operations mainboard_arima_hdama_ops = { - .name = "Arima HDAMA mainboard ", .enable_dev = enable_dev, }; diff --git a/src/northbridge/amd/amdk8/coherent_ht.c b/src/northbridge/amd/amdk8/coherent_ht.c index 10d1da7627..25779a2bf2 100644 --- a/src/northbridge/amd/amdk8/coherent_ht.c +++ b/src/northbridge/amd/amdk8/coherent_ht.c @@ -24,7 +24,7 @@ * don't want broadcast to be enabled for that node. */ -#define generate_temp_row(x...) ((generate_row(x)&(~0x0f0000))|0x010000) +#define generate_temp_row(...) ((generate_row(__VA_ARGS__)&(~0x0f0000))|0x010000) #define clear_temp_row(x) fill_row(x,7,DEFAULT) #define enable_bsp_routing() enable_routing(0) diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c index 1222b290f6..168661959c 100644 --- a/src/northbridge/amd/amdk8/northbridge.c +++ b/src/northbridge/amd/amdk8/northbridge.c @@ -13,9 +13,6 @@ #include "northbridge.h" #include "amdk8.h" -#define DEVICE_MEM_HIGH 0xFEC00000ULL /* Reserve 20M for the system */ -#define DEVICE_IO_START 0x1000 - #define FX_DEVS 8 static device_t __f0_dev[FX_DEVS]; static device_t __f1_dev[FX_DEVS]; @@ -468,7 +465,9 @@ static void mcf0_control_init(struct device *dev) cmd |= 0x00000600; pci_write_config32(dev, 0xdc, cmd ); #endif +#if 0 printk_debug("done.\n"); +#endif } static struct device_operations northbridge_operations = { @@ -489,8 +488,6 @@ static struct pci_driver mcf0_driver __pci_driver = { }; -#define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH) - static void pci_domain_read_resources(device_t dev) { struct resource *resource; @@ -521,28 +518,15 @@ static void pci_domain_read_resources(device_t dev) } /* Initialize the system wide io space constraints */ - resource = new_resource(dev, 0); + resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0)); resource->base = 0x400; resource->limit = 0xffffUL; - resource->flags = IORESOURCE_IO; - compute_allocate_resource(&dev->link[0], resource, - IORESOURCE_IO, IORESOURCE_IO); - - /* Initialize the system wide prefetchable memory resources constraints */ - resource = new_resource(dev, 1); - resource->limit = 0xfcffffffffULL; - resource->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH; - compute_allocate_resource(&dev->link[0], resource, - IORESOURCE_MEM | IORESOURCE_PREFETCH, - IORESOURCE_MEM | IORESOURCE_PREFETCH); + resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; /* Initialize the system wide memory resources constraints */ - resource = new_resource(dev, 2); + resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0)); resource->limit = 0xfcffffffffULL; - resource->flags = IORESOURCE_MEM; - compute_allocate_resource(&dev->link[0], resource, - IORESOURCE_MEM | IORESOURCE_PREFETCH, - IORESOURCE_MEM); + resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; } static void ram_resource(device_t dev, unsigned long index, @@ -560,75 +544,37 @@ static void ram_resource(device_t dev, unsigned long index, IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED; } +static void tolm_test(void *gp, struct device *dev, struct resource *new) +{ + struct resource **best_p = gp; + struct resource *best; + best = *best_p; + if (!best || (best->base > new->base)) { + best = new; + } + *best_p = best; +} + +static uint32_t find_pci_tolm(struct bus *bus) +{ + struct resource *min; + uint32_t tolm; + min = 0; + search_bus_resources(bus, IORESOURCE_MEM, IORESOURCE_MEM, tolm_test, &min); + tolm = 0xffffffffUL; + if (min && tolm > min->base) { + tolm = min->base; + } + return tolm; +} + static void pci_domain_set_resources(device_t dev) { - struct resource *io, *mem1, *mem2; - struct resource *resource, *last; unsigned long mmio_basek; uint32_t pci_tolm; int i, idx; -#if 0 - /* Place the IO devices somewhere safe */ - io = find_resource(dev, 0); - io->base = DEVICE_IO_START; -#endif -#if 1 - /* Now reallocate the pci resources memory with the - * highest addresses I can manage. - */ - mem1 = find_resource(dev, 1); - mem2 = find_resource(dev, 2); - /* See if both resources have roughly the same limits */ - if (((mem1->limit <= 0xffffffff) && (mem2->limit <= 0xffffffff)) || - ((mem1->limit > 0xffffffff) && (mem2->limit > 0xffffffff))) - { - /* If so place the one with the most stringent alignment first - */ - if (mem2->align > mem1->align) { - struct resource *tmp; - tmp = mem1; - mem1 = mem2; - mem2 = tmp; - } - /* Now place the memory as high up as it will go */ - mem2->base = resource_max(mem2); - mem1->limit = mem2->base - 1; - mem1->base = resource_max(mem1); - } - else { - /* Place the resources as high up as they will go */ - mem2->base = resource_max(mem2); - mem1->base = resource_max(mem1); - } - -#if 0 - printk_debug("base1: 0x%08Lx limit1: 0x%08lx size: 0x%08Lx\n", - mem1->base, mem1->limit, mem1->size); - printk_debug("base2: 0x%08Lx limit2: 0x%08Lx size: 0x%08Lx\n", - mem2->base, mem2->limit, mem2->size); -#endif -#endif - pci_tolm = 0xffffffffUL; - last = &dev->resource[dev->resources]; - for(resource = &dev->resource[0]; resource < last; resource++) - { -#if 1 - resource->flags |= IORESOURCE_ASSIGNED; - resource->flags &= ~IORESOURCE_STORED; -#endif - compute_allocate_resource(&dev->link[0], resource, - BRIDGE_IO_MASK, resource->flags & BRIDGE_IO_MASK); - - resource->flags |= IORESOURCE_STORED; - report_resource_stored(dev, resource, ""); - - if ((resource->flags & IORESOURCE_MEM) && - (pci_tolm > resource->base)) - { - pci_tolm = resource->base; - } - } + pci_tolm = find_pci_tolm(&dev->link[0]); #warning "FIXME handle interleaved nodes" mmio_basek = pci_tolm >> 10; @@ -682,14 +628,12 @@ static void pci_domain_set_resources(device_t dev) } ram_resource(dev, idx++, basek, sizek); } - assign_resources(&dev->link[0]); } static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max) { unsigned reg; - int i; /* Unmap all of the HT chains */ for(reg = 0xe0; reg <= 0xec; reg += 4) { f1_write_config32(reg, 0); @@ -709,7 +653,6 @@ static struct device_operations pci_domain_ops = { static unsigned int cpu_bus_scan(device_t dev, unsigned int max) { struct bus *cpu_bus; - unsigned reg; int i; /* Find which cpus are present */ @@ -771,8 +714,6 @@ static struct device_operations cpu_bus_ops = { static void enable_dev(struct device *dev) { - struct device_path path; - /* Set the operations if it is a special bus type */ if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) { dev->ops = &pci_domain_ops; @@ -783,6 +724,5 @@ static void enable_dev(struct device *dev) } struct chip_operations northbridge_amd_amdk8_ops = { - .name = "AMD K8 Northbridge", .enable_dev = enable_dev, }; diff --git a/src/ram/ramtest.c b/src/ram/ramtest.c index 841b0fe675..d2c750eec6 100644 --- a/src/ram/ramtest.c +++ b/src/ram/ramtest.c @@ -1,10 +1,3 @@ -#if defined(i786) -#define HAVE_MOVNTI 1 -#endif -#if defined(k8) -#define HAVE_MOVNTI 1 -#endif - static void write_phys(unsigned long addr, unsigned long value) { #if HAVE_MOVNTI diff --git a/src/southbridge/amd/amd8111/amd8111.c b/src/southbridge/amd/amd8111/amd8111.c index 6e7022cd77..238a997916 100644 --- a/src/southbridge/amd/amd8111/amd8111.c +++ b/src/southbridge/amd/amd8111/amd8111.c @@ -65,6 +65,5 @@ void amd8111_enable(device_t dev) } struct chip_operations southbridge_amd_amd8111_ops = { - .name = "AMD 8111", .enable_dev = amd8111_enable, }; diff --git a/src/superio/NSC/pc87360/superio.c b/src/superio/NSC/pc87360/superio.c index 69eeb31e09..af7d72bf57 100644 --- a/src/superio/NSC/pc87360/superio.c +++ b/src/superio/NSC/pc87360/superio.c @@ -71,6 +71,5 @@ static void enable_dev(struct device *dev) } struct chip_operations superio_NSC_pc87360_ops = { - .name = "NSC 87360", .enable_dev = enable_dev, }; diff --git a/targets/arima/hdama/Config.lb b/targets/arima/hdama/Config.lb index 350c2b0857..8e5a16c02e 100644 --- a/targets/arima/hdama/Config.lb +++ b/targets/arima/hdama/Config.lb @@ -9,14 +9,14 @@ mainboard arima/hdama # Arima hdama romimage "normal" option USE_FALLBACK_IMAGE=0 - option ROM_IMAGE_SIZE=0x10000 + option ROM_IMAGE_SIZE=0x10400 option LINUXBIOS_EXTRA_VERSION=".0Normal" payload /usr/share/etherboot/5.2.1eb1-lnxi-lb/tg3--ide_disk.zelf end romimage "fallback" option USE_FALLBACK_IMAGE=1 - option ROM_IMAGE_SIZE=0x10000 + option ROM_IMAGE_SIZE=0x10400 option LINUXBIOS_EXTRA_VERSION=".0Fallback" payload /usr/share/etherboot/5.2.1eb1-lnxi-lb/tg3--ide_disk.zelf # use this to test a build if you don't have the etherboot diff --git a/util/romcc/romcc.c b/util/romcc/romcc.c index f9719e8208..e03bb6b41b 100644 --- a/util/romcc/romcc.c +++ b/util/romcc/romcc.c @@ -3557,7 +3557,7 @@ static void define_macro( if (macro != 0) { /* Explicitly allow identical redefinitions of the same macro */ if ((macro->buf_len == value_len) && - (memcmp(macro->buf, value, value_len))) { + (memcmp(macro->buf, value, value_len) == 0)) { return; } error(state, 0, "macro %s already defined\n", ident->name); @@ -4804,7 +4804,7 @@ static long_t mprimary_expr(struct compile_state *state, int index) if ((lval > LONG_T_MAX) || (lval < LONG_T_MIN) || (((lval == LONG_MIN) || (lval == LONG_MAX)) && (errno == ERANGE))) { - error(state, 0, "Integer constant to large"); + error(state, 0, "Integer constant `%s' to large", state->token[index].val.str); } val = lval; break; @@ -24196,6 +24196,16 @@ static void print_op_move(struct compile_state *state, } } #endif /* X86_4_8BIT_GPRS */ + /* Move from %eax:%edx to %eax:%edx */ + else if ((src_regcm & REGCM_DIVIDEND64) && + (dst_regcm & REGCM_DIVIDEND64) && + (src_reg == dst_reg)) { + if (!omit_copy) { + fprintf(fp, "\t/*mov %s, %s*/\n", + arch_reg_str(src_reg), + arch_reg_str(dst_reg)); + } + } else { if ((src_regcm & ~REGCM_FLAGS) == 0) { internal_error(state, ins, "attempt to copy from %%eflags!"); |