summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--src/soc/qualcomm/ipq806x/include/gpio.h8
-rw-r--r--src/soc/qualcomm/ipq806x/include/spi.h8
-rw-r--r--src/soc/qualcomm/ipq806x/spi.c4
3 files changed, 10 insertions, 10 deletions
diff --git a/src/soc/qualcomm/ipq806x/include/gpio.h b/src/soc/qualcomm/ipq806x/include/gpio.h
index efaf30e996..c1cefd4a8b 100644
--- a/src/soc/qualcomm/ipq806x/include/gpio.h
+++ b/src/soc/qualcomm/ipq806x/include/gpio.h
@@ -35,6 +35,14 @@
typedef unsigned int gpio_t;
+#define GPIO_FUNC_ENABLE 1
+#define GPIO_FUNC_DISABLE 0
+#define FUNC_SEL_1 1
+#define FUNC_SEL_3 3
+#define FUNC_SEL_GPIO 0
+#define GPIO_DRV_STR_10MA 0x4
+#define GPIO_DRV_STR_11MA 0x7
+
/* GPIO TLMM: Direction */
#define GPIO_INPUT 0
#define GPIO_OUTPUT 1
diff --git a/src/soc/qualcomm/ipq806x/include/spi.h b/src/soc/qualcomm/ipq806x/include/spi.h
index 48073fadd0..f7dda07a51 100644
--- a/src/soc/qualcomm/ipq806x/include/spi.h
+++ b/src/soc/qualcomm/ipq806x/include/spi.h
@@ -229,14 +229,6 @@
#define GSBI7_SPI_MISO 7
#define GSBI7_SPI_MOSI 6
-#define GPIO_FUNC_ENABLE 1
-#define GPIO_FUNC_DISABLE 0
-#define FUNC_SEL_1 1
-#define FUNC_SEL_3 3
-#define FUNC_SEL_GPIO 0
-#define GPIO_DRV_STR_10MA 0x4
-#define GPIO_DRV_STR_11MA 0x7
-#define GPIO_OUT 1
#define MSM_GSBI_MAX_FREQ 51200000
#define SPI_RESET_STATE 0
diff --git a/src/soc/qualcomm/ipq806x/spi.c b/src/soc/qualcomm/ipq806x/spi.c
index 52d11c19c4..f1a180ba88 100644
--- a/src/soc/qualcomm/ipq806x/spi.c
+++ b/src/soc/qualcomm/ipq806x/spi.c
@@ -277,9 +277,9 @@ static void CS_change(int port_num, int cs_num, int enable)
uint32_t addr = GPIO_IN_OUT_ADDR(cs_gpio);
uint32_t val = readl_i(addr);
- val &= (~(1 << GPIO_OUT));
+ val &= (~(1 << GPIO_OUTPUT));
if (!enable)
- val |= (1 << GPIO_OUT);
+ val |= (1 << GPIO_OUTPUT);
writel_i(val, addr);
}