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-rw-r--r--src/device/device.c2
-rw-r--r--src/drivers/siemens/nc_fpga/nc_fpga.c2
-rw-r--r--src/lib/ramtest.c2
-rw-r--r--src/mainboard/asus/am1i-a/BiosCallOuts.c2
-rw-r--r--src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c2
-rw-r--r--src/northbridge/amd/amdmct/wrappers/mcti_d.c2
6 files changed, 6 insertions, 6 deletions
diff --git a/src/device/device.c b/src/device/device.c
index b896f5e683..02209d9e36 100644
--- a/src/device/device.c
+++ b/src/device/device.c
@@ -723,7 +723,7 @@ static void avoid_fixed_resources(const struct device *dev)
if (res->base > lim->base)
lim->base = res->base;
- if (res->limit < lim->limit)
+ if (res->limit < lim->limit)
lim->limit = res->limit;
}
diff --git a/src/drivers/siemens/nc_fpga/nc_fpga.c b/src/drivers/siemens/nc_fpga/nc_fpga.c
index 41b79a63b2..5efded7304 100644
--- a/src/drivers/siemens/nc_fpga/nc_fpga.c
+++ b/src/drivers/siemens/nc_fpga/nc_fpga.c
@@ -84,7 +84,7 @@ static void init_fan_ctrl (void *base_adr)
(hwilib_get_field(FF_FreezeDis, &freeze_disable, 1) == 1)) {
if (!fan_req)
mask = 1;
- else if (fan_req && !freeze_disable)
+ else if (fan_req && !freeze_disable)
mask = 2;
else
mask = 3;
diff --git a/src/lib/ramtest.c b/src/lib/ramtest.c
index 9adcafdd30..461a028b11 100644
--- a/src/lib/ramtest.c
+++ b/src/lib/ramtest.c
@@ -102,7 +102,7 @@ static int ram_bitset_nodie(unsigned long start)
failed = (value2 != value);
failures |= failed;
- if (failed && !verbose) {
+ if (failed && !verbose) {
printk(BIOS_ERR, "0x%08lx wr: 0x%08lx rd: 0x%08lx FAIL\n",
start + addr, value, value2);
}
diff --git a/src/mainboard/asus/am1i-a/BiosCallOuts.c b/src/mainboard/asus/am1i-a/BiosCallOuts.c
index dae44ca792..6b25d38b01 100644
--- a/src/mainboard/asus/am1i-a/BiosCallOuts.c
+++ b/src/mainboard/asus/am1i-a/BiosCallOuts.c
@@ -105,7 +105,7 @@ void board_FCH_InitReset(struct sysinfo *cb_NA, FCH_RESET_DATA_BLOCK *FchParams_
/* Read SATA speed setting from CMOS */
enum cb_err ret;
ret = get_option(&FchParams_reset->SataSetMaxGen2, "sata_speed");
- if (ret != CB_SUCCESS) {
+ if (ret != CB_SUCCESS) {
FchParams_reset->SataSetMaxGen2 = 0;
printk(BIOS_DEBUG, "ERROR: cannot read CMOS setting, falling back to default. Error code: %x\n", (int)ret);
}
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c
index 10d4206559..f751733f73 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c
@@ -2090,7 +2090,7 @@ static u16 CompareDQSTestPattern_D(struct MCTStatStruc *pMCTstat, struct DCTStat
if (pDCTstat->Direction == DQS_READDIR) {
if (BeatCnt != 0) {
- if (((value_r >> j) & 0xff) != ((value_r_test >> j) & 0xff)) {
+ if (((value_r >> j) & 0xff) != ((value_r_test >> j) & 0xff)) {
MEn1Results &= ~(1 << bytelane);
}
}
diff --git a/src/northbridge/amd/amdmct/wrappers/mcti_d.c b/src/northbridge/amd/amdmct/wrappers/mcti_d.c
index 306f3a7429..66730fc7aa 100644
--- a/src/northbridge/amd/amdmct/wrappers/mcti_d.c
+++ b/src/northbridge/amd/amdmct/wrappers/mcti_d.c
@@ -130,7 +130,7 @@ u16 mctGet_NVbits(u8 index)
case NV_BYPMAX:
#if !IS_ENABLED(CONFIG_GFXUMA)
val = 4;
-#elif IS_ENABLED(CONFIG_GFXUMA)
+#elif IS_ENABLED(CONFIG_GFXUMA)
val = 7;
#endif
break;