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-rw-r--r--src/mainboard/google/fizz/devicetree.cb3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/google/fizz/devicetree.cb b/src/mainboard/google/fizz/devicetree.cb
index db6c83f2ed..1ee54aaa60 100644
--- a/src/mainboard/google/fizz/devicetree.cb
+++ b/src/mainboard/google/fizz/devicetree.cb
@@ -50,6 +50,9 @@ chip soc/intel/skylake
# Enable DPTF
register "dptf_enable" = "1"
+ # Enable S0ix
+ register "s0ix_enable" = "1"
+
# FSP Configuration
register "ProbelessTrace" = "0"
register "EnableLan" = "1"