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-rw-r--r--src/mainboard/advansus/a785e-i/get_bus_conf.c7
-rw-r--r--src/mainboard/asus/m5a88-v/get_bus_conf.c7
-rw-r--r--src/mainboard/avalue/eax-785e/get_bus_conf.c7
-rw-r--r--src/northbridge/amd/amdfam10/northbridge.c8
-rw-r--r--src/southbridge/amd/rs780/rs780.c2
5 files changed, 0 insertions, 31 deletions
diff --git a/src/mainboard/advansus/a785e-i/get_bus_conf.c b/src/mainboard/advansus/a785e-i/get_bus_conf.c
index c390977524..65175f98dc 100644
--- a/src/mainboard/advansus/a785e-i/get_bus_conf.c
+++ b/src/mainboard/advansus/a785e-i/get_bus_conf.c
@@ -19,9 +19,6 @@
#include <stdlib.h>
#include <cpu/amd/multicore.h>
#include <cpu/amd/amdfam10_sysconf.h>
-#if IS_ENABLED(CONFIG_AMD_SB_CIMX)
-#include <sb_cimx.h>
-#endif
/* Global variables for MB layouts and these will be shared by irqtable mptable
* and acpi_tables busnum is default.
@@ -125,8 +122,4 @@ void get_bus_conf(void)
else
apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
apicid_sb800 = apicid_base + 0;
-
-#if IS_ENABLED(CONFIG_AMD_SB_CIMX)
- sb_Late_Post();
-#endif
}
diff --git a/src/mainboard/asus/m5a88-v/get_bus_conf.c b/src/mainboard/asus/m5a88-v/get_bus_conf.c
index 780630568c..92b4084867 100644
--- a/src/mainboard/asus/m5a88-v/get_bus_conf.c
+++ b/src/mainboard/asus/m5a88-v/get_bus_conf.c
@@ -19,9 +19,6 @@
#include <stdlib.h>
#include <cpu/amd/multicore.h>
#include <cpu/amd/amdfam10_sysconf.h>
-#if IS_ENABLED(CONFIG_AMD_SB_CIMX)
-#include <sb_cimx.h>
-#endif
/* Global variables for MB layouts and these will be shared by irqtable mptable
* and acpi_tables busnum is default.
@@ -125,8 +122,4 @@ void get_bus_conf(void)
else
apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
apicid_sb800 = apicid_base + 0;
-
-#if IS_ENABLED(CONFIG_AMD_SB_CIMX)
- sb_Late_Post();
-#endif
}
diff --git a/src/mainboard/avalue/eax-785e/get_bus_conf.c b/src/mainboard/avalue/eax-785e/get_bus_conf.c
index 780630568c..92b4084867 100644
--- a/src/mainboard/avalue/eax-785e/get_bus_conf.c
+++ b/src/mainboard/avalue/eax-785e/get_bus_conf.c
@@ -19,9 +19,6 @@
#include <stdlib.h>
#include <cpu/amd/multicore.h>
#include <cpu/amd/amdfam10_sysconf.h>
-#if IS_ENABLED(CONFIG_AMD_SB_CIMX)
-#include <sb_cimx.h>
-#endif
/* Global variables for MB layouts and these will be shared by irqtable mptable
* and acpi_tables busnum is default.
@@ -125,8 +122,4 @@ void get_bus_conf(void)
else
apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
apicid_sb800 = apicid_base + 0;
-
-#if IS_ENABLED(CONFIG_AMD_SB_CIMX)
- sb_Late_Post();
-#endif
}
diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c
index 4da5228666..245e3abb99 100644
--- a/src/northbridge/amd/amdfam10/northbridge.c
+++ b/src/northbridge/amd/amdfam10/northbridge.c
@@ -49,10 +49,6 @@
#include <cpu/amd/model_10xxx_rev.h>
#endif
-#if IS_ENABLED(CONFIG_AMD_SB_CIMX)
-#include <sb_cimx.h>
-#endif
-
#if IS_ENABLED(CONFIG_DIMM_DDR3)
#include "../amdmct/mct_ddr3/s3utils.h"
#endif
@@ -1948,10 +1944,6 @@ static void cpu_bus_init(struct device *dev)
detect_and_enable_probe_filter(dev);
detect_and_enable_cache_partitioning(dev);
initialize_cpus(dev->link_list);
-#if IS_ENABLED(CONFIG_AMD_SB_CIMX)
- sb_After_Pci_Init();
- sb_Mid_Post_Init();
-#endif
}
static struct device_operations cpu_bus_ops = {
diff --git a/src/southbridge/amd/rs780/rs780.c b/src/southbridge/amd/rs780/rs780.c
index 36b37ccbe6..a753da77be 100644
--- a/src/southbridge/amd/rs780/rs780.c
+++ b/src/southbridge/amd/rs780/rs780.c
@@ -349,7 +349,6 @@ void rs780_enable(struct device *dev)
}
}
-#if !IS_ENABLED(CONFIG_AMD_SB_CIMX)
unsigned long acpi_fill_mcfg(unsigned long current)
{
/* FIXME
@@ -358,7 +357,6 @@ unsigned long acpi_fill_mcfg(unsigned long current)
*/
return current;
}
-#endif
struct chip_operations southbridge_amd_rs780_ops = {
CHIP_NAME("ATI RS780")