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-rw-r--r--src/cpu/intel/car/romstage.c2
-rw-r--r--src/soc/intel/apollolake/romstage.c3
-rw-r--r--src/soc/intel/cannonlake/romstage/romstage.c2
-rw-r--r--src/soc/intel/icelake/romstage/romstage.c2
-rw-r--r--src/soc/intel/skylake/romstage/romstage_fsp20.c2
5 files changed, 2 insertions, 9 deletions
diff --git a/src/cpu/intel/car/romstage.c b/src/cpu/intel/car/romstage.c
index ac81b021a8..547b1211df 100644
--- a/src/cpu/intel/car/romstage.c
+++ b/src/cpu/intel/car/romstage.c
@@ -87,6 +87,8 @@ asmlinkage void bootblock_c_entry_bist(uint64_t base_timestamp, uint32_t bist)
asmlinkage void car_stage_entry(void)
{
+ timestamp_add_now(TS_START_ROMSTAGE);
+
/* Assumes the hardware was set up during the bootblock */
console_init();
diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c
index 2c283396c9..7e369f46c8 100644
--- a/src/soc/intel/apollolake/romstage.c
+++ b/src/soc/intel/apollolake/romstage.c
@@ -47,7 +47,6 @@
#include <soc/systemagent.h>
#include <spi_flash.h>
#include <timer.h>
-#include <timestamp.h>
#include "chip.h"
static const uint8_t hob_variable_guid[16] = {
@@ -199,8 +198,6 @@ void mainboard_romstage_entry(void)
struct chipset_power_state *ps = pmc_get_power_state();
const void *new_var_data;
- timestamp_add_now(TS_START_ROMSTAGE);
-
soc_early_romstage_init();
s3wake = pmc_fill_power_state(ps) == ACPI_S3;
diff --git a/src/soc/intel/cannonlake/romstage/romstage.c b/src/soc/intel/cannonlake/romstage/romstage.c
index 5711c15142..fb5e42b200 100644
--- a/src/soc/intel/cannonlake/romstage/romstage.c
+++ b/src/soc/intel/cannonlake/romstage/romstage.c
@@ -28,7 +28,6 @@
#include <soc/pm.h>
#include <soc/romstage.h>
#include <string.h>
-#include <timestamp.h>
#include "../chip.h"
@@ -137,7 +136,6 @@ void mainboard_romstage_entry(void)
/* initialize Heci interface */
heci_init(HECI1_BASE_ADDRESS);
- timestamp_add_now(TS_START_ROMSTAGE);
s3wake = pmc_fill_power_state(ps) == ACPI_S3;
fsp_memory_init(s3wake);
pmc_set_disb();
diff --git a/src/soc/intel/icelake/romstage/romstage.c b/src/soc/intel/icelake/romstage/romstage.c
index 67ef2bb6ce..a96f057d58 100644
--- a/src/soc/intel/icelake/romstage/romstage.c
+++ b/src/soc/intel/icelake/romstage/romstage.c
@@ -29,7 +29,6 @@
#include <soc/romstage.h>
#include <soc/soc_chip.h>
#include <string.h>
-#include <timestamp.h>
#define FSP_SMBIOS_MEMORY_INFO_GUID \
{ \
@@ -121,7 +120,6 @@ void mainboard_romstage_entry(void)
/* initialize Heci interface */
heci_init(HECI1_BASE_ADDRESS);
- timestamp_add_now(TS_START_ROMSTAGE);
s3wake = pmc_fill_power_state(ps) == ACPI_S3;
fsp_memory_init(s3wake);
pmc_set_disb();
diff --git a/src/soc/intel/skylake/romstage/romstage_fsp20.c b/src/soc/intel/skylake/romstage/romstage_fsp20.c
index 2412f22a27..5388858449 100644
--- a/src/soc/intel/skylake/romstage/romstage_fsp20.c
+++ b/src/soc/intel/skylake/romstage/romstage_fsp20.c
@@ -32,7 +32,6 @@
#include <soc/pm.h>
#include <soc/romstage.h>
#include <string.h>
-#include <timestamp.h>
#include <security/vboot/vboot_common.h>
#include "../chip.h"
@@ -148,7 +147,6 @@ void mainboard_romstage_entry(void)
systemagent_early_init();
ps = pmc_get_power_state();
- timestamp_add_now(TS_START_ROMSTAGE);
s3wake = pmc_fill_power_state(ps) == ACPI_S3;
fsp_memory_init(s3wake);
pmc_set_disb();