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-rw-r--r--src/cpu/ppc/mpc74xx/Config.lb3
-rw-r--r--src/cpu/ppc/mpc74xx/cache.S23
2 files changed, 25 insertions, 1 deletions
diff --git a/src/cpu/ppc/mpc74xx/Config.lb b/src/cpu/ppc/mpc74xx/Config.lb
index 3c74233845..6005d9855c 100644
--- a/src/cpu/ppc/mpc74xx/Config.lb
+++ b/src/cpu/ppc/mpc74xx/Config.lb
@@ -17,6 +17,7 @@ default DCACHE_RAM_SIZE=0x8000
initinclude "FAMILY_INIT" cpu/ppc/mpc74xx/mpc74xx.inc
object clock.o
+object cache.S
initobject clock.o
-initobject cache.o
+initobject cache.S
diff --git a/src/cpu/ppc/mpc74xx/cache.S b/src/cpu/ppc/mpc74xx/cache.S
new file mode 100644
index 0000000000..237b178bdf
--- /dev/null
+++ b/src/cpu/ppc/mpc74xx/cache.S
@@ -0,0 +1,23 @@
+#define ASM
+#include "ppcreg.h"
+#include <ppc_asm.tmpl>
+
+#define NUM_CACHE_LINES 128*8
+#define L1_CACHE_LINE_SIZE 32
+#define cache_flush_buffer 0x1000
+
+/*
+ * Flush data cache
+ * Do this by just reading lots of stuff into the cache.
+ */
+.globl flush_dcache
+flush_dcache:
+ lis r3,cache_flush_buffer@h
+ ori r3,r3,cache_flush_buffer@l
+ li r4,NUM_CACHE_LINES
+ mtctr r4
+0: lwz r4,0(r3)
+ addi r3,r3,L1_CACHE_LINE_SIZE
+ bdnz 0b
+ blr
+