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-rw-r--r--src/soc/intel/braswell/cpu.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/intel/braswell/cpu.c b/src/soc/intel/braswell/cpu.c
index 12f34fb2fe..5f86a11db1 100644
--- a/src/soc/intel/braswell/cpu.c
+++ b/src/soc/intel/braswell/cpu.c
@@ -3,6 +3,7 @@
*
* Copyright (C) 2013 Google Inc.
* Copyright (C) 2015 Intel Corp.
+ * Copyright (C) 2018 Eltan B.V.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -52,6 +53,9 @@ static void soc_core_init(struct device *cpu)
__FILE__, __func__, dev_name(cpu));
printk(BIOS_DEBUG, "Init Braswell core.\n");
+ /* Enable the local cpu apics */
+ setup_lapic();
+
/*
* The turbo disable bit is actually scoped at building
* block level -- not package. For non-bsp cores that are within a