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-rw-r--r--src/soc/intel/tigerlake/romstage/fsp_params_jsl.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/soc/intel/tigerlake/romstage/fsp_params_jsl.c b/src/soc/intel/tigerlake/romstage/fsp_params_jsl.c
index e88d809cd3..829e1e35ea 100644
--- a/src/soc/intel/tigerlake/romstage/fsp_params_jsl.c
+++ b/src/soc/intel/tigerlake/romstage/fsp_params_jsl.c
@@ -87,6 +87,13 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg,
m_cfg->SerialIoUartDebugControllerNumber = CONFIG_UART_FOR_CONSOLE;
+ /* Display */
+ m_cfg->DdiPortAConfig = config->DdiPortAConfig;
+ m_cfg->DdiPortBHpd = config->DdiPortBHpd;
+ m_cfg->DdiPortCHpd = config->DdiPortCHpd;
+ m_cfg->DdiPortBDdc = config->DdiPortBDdc;
+ m_cfg->DdiPortCDdc = config->DdiPortCDdc;
+
/* Audio */
m_cfg->PchHdaEnable = pcidev_path_on_root(PCH_DEVFN_HDA) ? dev->enabled : 0;