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-rw-r--r--src/northbridge/via/vx800/vx800_lpc.c2
-rw-r--r--src/southbridge/amd/sb600/sb600.h3
-rw-r--r--src/southbridge/amd/sb600/sb600_early_setup.c4
3 files changed, 7 insertions, 2 deletions
diff --git a/src/northbridge/via/vx800/vx800_lpc.c b/src/northbridge/via/vx800/vx800_lpc.c
index ce2d822946..4996e57c68 100644
--- a/src/northbridge/via/vx800/vx800_lpc.c
+++ b/src/northbridge/via/vx800/vx800_lpc.c
@@ -342,9 +342,11 @@ static void southbridge_init(struct device *dev)
/* turn on keyboard and RTC, no need to visit this reg twice */
pc_keyboard_init(0);
+
printk(BIOS_DEBUG, "ps2 usb lid, you set who can wakeup system from s3 sleep\n");
S3_ps2_kb_ms_wakeup(dev);
S3_usb_wakeup(dev);
+ S3_lid_wakeup(dev);
/* enable acpi cpu c3 state. (c2 state need not do anything.)
#1
diff --git a/src/southbridge/amd/sb600/sb600.h b/src/southbridge/amd/sb600/sb600.h
index ce8bce446a..629f389973 100644
--- a/src/southbridge/amd/sb600/sb600.h
+++ b/src/southbridge/amd/sb600/sb600.h
@@ -37,4 +37,7 @@ extern void set_sm_enable_bits(device_t sm_dev, u32 reg_pos, u32 mask, u32 val);
void sb600_enable(device_t dev);
+void sb600_lpc_port80(void);
+void sb600_pci_port80(void);
+
#endif /* SB600_H */
diff --git a/src/southbridge/amd/sb600/sb600_early_setup.c b/src/southbridge/amd/sb600/sb600_early_setup.c
index 1ba9e5180c..a6888269f7 100644
--- a/src/southbridge/amd/sb600/sb600_early_setup.c
+++ b/src/southbridge/amd/sb600/sb600_early_setup.c
@@ -213,7 +213,7 @@ void soft_reset(void)
outb(0x06, 0x0cf9);
}
-static void sb600_pci_port80(void)
+void sb600_pci_port80(void)
{
u8 byte;
device_t dev;
@@ -258,7 +258,7 @@ static void sb600_pci_port80(void)
pci_write_config8(dev, 0x4A, byte);
}
-static void sb600_lpc_port80(void)
+void sb600_lpc_port80(void)
{
u8 byte;
device_t dev;