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-rw-r--r--src/arch/riscv/virtual_memory.c12
1 files changed, 7 insertions, 5 deletions
diff --git a/src/arch/riscv/virtual_memory.c b/src/arch/riscv/virtual_memory.c
index 3bee86865d..5b35e811d9 100644
--- a/src/arch/riscv/virtual_memory.c
+++ b/src/arch/riscv/virtual_memory.c
@@ -14,6 +14,7 @@
* GNU General Public License for more details.
*/
+#include <arch/cpu.h>
#include <arch/encoding.h>
#include <stdint.h>
#include <vm.h>
@@ -52,11 +53,12 @@ void mstatus_init(void)
// all other supervisor interrupts.
set_csr(mie, MIP_MTIP | MIP_STIP | MIP_SSIP);
- // Delegate supervisor timer and other interrupts
- // to supervisor mode.
- set_csr(mideleg, MIP_STIP | MIP_SSIP);
-
- set_csr(medeleg, delegate);
+ // Delegate supervisor timer and other interrupts to supervisor mode,
+ // if supervisor mode is supported.
+ if (supports_extension('S')) {
+ set_csr(mideleg, MIP_STIP | MIP_SSIP);
+ set_csr(medeleg, delegate);
+ }
// Enable all user/supervisor-mode counters using
// v1.10 register addresses.