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-rw-r--r--src/vendorcode/intel/fsp/fsp2_0/apollolake/FspmUpd.h36
-rw-r--r--src/vendorcode/intel/fsp/fsp2_0/apollolake/FspsUpd.h59
2 files changed, 33 insertions, 62 deletions
diff --git a/src/vendorcode/intel/fsp/fsp2_0/apollolake/FspmUpd.h b/src/vendorcode/intel/fsp/fsp2_0/apollolake/FspmUpd.h
index d0620f5c0d..3cfbd71620 100644
--- a/src/vendorcode/intel/fsp/fsp2_0/apollolake/FspmUpd.h
+++ b/src/vendorcode/intel/fsp/fsp2_0/apollolake/FspmUpd.h
@@ -820,32 +820,6 @@ typedef struct {
UINT8 ReservedFspmUpd[12];
} FSP_M_CONFIG;
-/** Fsp M Test Configuration
-**/
-typedef struct {
-
-/** Offset 0x0160
-**/
- UINT32 Signature;
-
-/** Offset 0x0164
-**/
- UINT8 ReservedFspmTestUpd[12];
-} FSP_M_TEST_CONFIG;
-
-/** Fsp M Restricted Configuration
-**/
-typedef struct {
-
-/** Offset 0x0170
-**/
- UINT32 Signature;
-
-/** Offset 0x0174
-**/
- UINT8 ReservedFspmRestrictedUpd[124];
-} FSP_M_RESTRICTED_CONFIG;
-
/** Fsp M UPD Configuration
**/
typedef struct {
@@ -864,15 +838,7 @@ typedef struct {
/** Offset 0x0160
**/
- FSP_M_TEST_CONFIG FspmTestConfig;
-
-/** Offset 0x0170
-**/
- FSP_M_RESTRICTED_CONFIG FspmRestrictedConfig;
-
-/** Offset 0x01F0
-**/
- UINT8 UnusedUpdSpace2[14];
+ UINT8 UnusedUpdSpace2[158];
/** Offset 0x01FE
**/
diff --git a/src/vendorcode/intel/fsp/fsp2_0/apollolake/FspsUpd.h b/src/vendorcode/intel/fsp/fsp2_0/apollolake/FspsUpd.h
index 8a4fe1a393..82a224d629 100644
--- a/src/vendorcode/intel/fsp/fsp2_0/apollolake/FspsUpd.h
+++ b/src/vendorcode/intel/fsp/fsp2_0/apollolake/FspsUpd.h
@@ -1521,34 +1521,47 @@ typedef struct {
/** Offset 0x0334
**/
- UINT8 ReservedFspsUpd[12];
-} FSP_S_CONFIG;
+ UINT8 UnusedUpdSpace7[4];
-/** Fsp S Test Configuration
+/** Offset 0x0338 - PerPort Half Bit Pre-emphasis
+ PerPort Half Bit Pre-emphasis. Value of register USB2_PER_PORT_PPX [14]
**/
-typedef struct {
+ UINT8 PortUsb20PerPortTxPeHalf[8];
-/** Offset 0x0340
+/** Offset 0x0340 - PerPort HS Pre-emphasis Bias
+ PerPort HS Pre-emphasis Bias. Value of register USB2_PER_PORT_PPX [13:11]
**/
- UINT32 Signature;
+ UINT8 PortUsb20PerPortPeTxiSet[8];
-/** Offset 0x0344
+/** Offset 0x0348 - PerPort HS Transmitter Bias
+ PerPort HS Transmitter Bias. Value of register USB2_PER_PORT_PPX [10:8]
**/
- UINT8 ReservedFspsTestUpd[12];
-} FSP_S_TEST_CONFIG;
+ UINT8 PortUsb20PerPortTxiSet[8];
-/** Fsp S Restricted Configuration
+/** Offset 0x0350 - Select the skew direction for HS transition
+ Select the skew direction for HS transition. Value of register USB2_PER_PORT_2_PPX [25]
**/
-typedef struct {
+ UINT8 PortUsb20HsSkewSel[8];
+
+/** Offset 0x0358 - Per Port HS Transmitter Emphasis
+ Per Port HS Transmitter Emphasis. Value of register USB2_PER_PORT_2_PPX [24:23]
+**/
+ UINT8 PortUsb20IUsbTxEmphasisEn[8];
+
+/** Offset 0x0360 - PerPort HS Receiver Bias
+ PerPort HS Receiver Bias. Value of register USB2_PER_PORT_2_PPX [19:17]
+**/
+ UINT8 PortUsb20PerPortRXISet[8];
-/** Offset 0x0350
+/** Offset 0x0368 - Delay/skew's strength control for HS driver
+ Delay/skew's strength control for HS driver. Value of register USB2_PER_PORT_2_PPX [1:0]
**/
- UINT32 Signature;
+ UINT8 PortUsb20HsNpreDrvSel[8];
-/** Offset 0x0354
+/** Offset 0x0370
**/
- UINT8 ReservedFspsRestrictedUpd[12];
-} FSP_S_RESTRICTED_CONFIG;
+ UINT8 ReservedFspsUpd[16];
+} FSP_S_CONFIG;
/** Fsp S UPD Configuration
**/
@@ -1562,19 +1575,11 @@ typedef struct {
**/
FSP_S_CONFIG FspsConfig;
-/** Offset 0x0340
-**/
- FSP_S_TEST_CONFIG FspsTestConfig;
-
-/** Offset 0x0350
-**/
- FSP_S_RESTRICTED_CONFIG FspsRestrictedConfig;
-
-/** Offset 0x0360
+/** Offset 0x0380
**/
- UINT8 UnusedUpdSpace7[14];
+ UINT8 UnusedUpdSpace8[46];
-/** Offset 0x036E
+/** Offset 0x03AE
**/
UINT16 UpdTerminator;
} FSPS_UPD;