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-rw-r--r--src/mainboard/rca/rm4100/Kconfig4
-rw-r--r--src/mainboard/rca/rm4100/mainboard.c9
-rw-r--r--src/mainboard/thomson/ip1000/Kconfig2
-rw-r--r--src/mainboard/thomson/ip1000/mainboard.c9
-rw-r--r--src/northbridge/intel/i82830/northbridge.c24
-rw-r--r--src/northbridge/intel/i82830/raminit.c2
6 files changed, 44 insertions, 6 deletions
diff --git a/src/mainboard/rca/rm4100/Kconfig b/src/mainboard/rca/rm4100/Kconfig
index fd54e99556..fb3ab625e1 100644
--- a/src/mainboard/rca/rm4100/Kconfig
+++ b/src/mainboard/rca/rm4100/Kconfig
@@ -8,9 +8,11 @@ config BOARD_RCA_RM4100
select ROMCC
select HAVE_PIRQ_TABLE
select UDELAY_TSC
- select BOARD_ROMSIZE_KB_512
+ select BOARD_ROMSIZE_KB_1024
+ select HAVE_MAINBOARD_RESOURCES
select HAVE_HARD_RESET
select HAVE_SMI_HANDLER
+ select GFXUMA
config MAINBOARD_DIR
string
diff --git a/src/mainboard/rca/rm4100/mainboard.c b/src/mainboard/rca/rm4100/mainboard.c
index 0324266a8d..2248ba791e 100644
--- a/src/mainboard/rca/rm4100/mainboard.c
+++ b/src/mainboard/rca/rm4100/mainboard.c
@@ -1,7 +1,7 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2008 Joseph Smith <joe@settoplinux.org>
+ * Copyright (C) 2008-2010 Joseph Smith <joe@settoplinux.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -19,8 +19,15 @@
*/
#include <device/device.h>
+#include <boot/tables.h>
+#include <arch/coreboot_tables.h>
#include "chip.h"
+int add_mainboard_resources(struct lb_memory *mem)
+{
+ return add_northbridge_resources(mem);
+}
+
static void mainboard_init(device_t dev)
{
// TODO Switch parport LEDs again
diff --git a/src/mainboard/thomson/ip1000/Kconfig b/src/mainboard/thomson/ip1000/Kconfig
index 3ea2ae926a..56ebee77b7 100644
--- a/src/mainboard/thomson/ip1000/Kconfig
+++ b/src/mainboard/thomson/ip1000/Kconfig
@@ -10,7 +10,9 @@ config BOARD_THOMSON_IP1000
select UDELAY_TSC
select BOARD_ROMSIZE_KB_512
select HAVE_HARD_RESET
+ select HAVE_MAINBOARD_RESOURCES
select HAVE_SMI_HANDLER
+ select GFXUMA
config MAINBOARD_DIR
string
diff --git a/src/mainboard/thomson/ip1000/mainboard.c b/src/mainboard/thomson/ip1000/mainboard.c
index daa6b7eb64..ae951d39e4 100644
--- a/src/mainboard/thomson/ip1000/mainboard.c
+++ b/src/mainboard/thomson/ip1000/mainboard.c
@@ -1,7 +1,7 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2008 Joseph Smith <joe@settoplinux.org>
+ * Copyright (C) 2008-2010 Joseph Smith <joe@settoplinux.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -19,8 +19,15 @@
*/
#include <device/device.h>
+#include <boot/tables.h>
+#include <arch/coreboot_tables.h>
#include "chip.h"
+int add_mainboard_resources(struct lb_memory *mem)
+{
+ return add_northbridge_resources(mem);
+}
+
static void mainboard_init(device_t dev)
{
// TODO Switch parport LEDs again
diff --git a/src/northbridge/intel/i82830/northbridge.c b/src/northbridge/intel/i82830/northbridge.c
index af9663df09..da76a5d89b 100644
--- a/src/northbridge/intel/i82830/northbridge.c
+++ b/src/northbridge/intel/i82830/northbridge.c
@@ -1,7 +1,7 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2008 Joseph Smith <joe@smittys.pointclark.net>
+ * Copyright (C) 2008-2010 Joseph Smith <joe@settoplinux.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -28,6 +28,8 @@
#include <stdlib.h>
#include <string.h>
#include <bitops.h>
+#include <boot/tables.h>
+#include <arch/coreboot_tables.h>
#include "chip.h"
#include "i82830.h"
@@ -88,6 +90,18 @@ static uint32_t find_pci_tolm(struct bus *bus)
return tolm;
}
+/* IGD memory */
+uint64_t uma_memory_base=0, uma_memory_size=0;
+
+int add_northbridge_resources(struct lb_memory *mem)
+{
+ printk_debug("Adding IGD UMA memory area\n");
+ lb_add_memory_range(mem, LB_MEM_RESERVED,
+ uma_memory_base, uma_memory_size);
+
+ return 0;
+}
+
#if CONFIG_WRITE_HIGH_TABLES==1
#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
extern uint64_t high_tables_base, high_tables_size;
@@ -106,8 +120,10 @@ static void pci_domain_set_resources(device_t dev)
if (CONFIG_VIDEO_MB == 512) {
igd_memory = (CONFIG_VIDEO_MB);
+ printk_debug("%dKB IGD UMA\n", igd_memory >> 10);
} else {
igd_memory = (CONFIG_VIDEO_MB * 1024);
+ printk_debug("%dMB IGD UMA\n", igd_memory >> 10);
}
/* Get the value of the highest DRB. This tells the end of
@@ -116,7 +132,11 @@ static void pci_domain_set_resources(device_t dev)
*/
tomk = ((unsigned long)pci_read_config8(mc_dev, DRB + 3)) << 15;
tomk -= igd_memory;
- printk_debug("Memory detected: %ldKB RAM\n", tomk);
+
+ /* For reserving UMA memory in the memory map */
+ uma_memory_base = tomk * 1024ULL;
+ uma_memory_size = igd_memory * 1024ULL;
+ printk_debug("Available memory: %ldKB\n", tomk);
/* Compute the top of low memory. */
tolmk = pci_tolm >> 10;
diff --git a/src/northbridge/intel/i82830/raminit.c b/src/northbridge/intel/i82830/raminit.c
index 9e2f3c4bf1..2eea5f0e19 100644
--- a/src/northbridge/intel/i82830/raminit.c
+++ b/src/northbridge/intel/i82830/raminit.c
@@ -48,7 +48,7 @@ Macros and definitions.
* 0x0 for Refresh Disabled (Self Refresh)
* 0x1 for Refresh interval 15.6 us for 133MHz
* 0x2 for Refresh interval 7.8 us for 133MHz
- * 0x7 /* Refresh interval 128 Clocks. (Fast Refresh Mode)
+ * 0x7 for Refresh interval 128 Clocks. (Fast Refresh Mode)
*/
#define RAM_COMMAND_REFRESH 0x1