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-rw-r--r--src/mainboard/supermicro/h8qme_fam10/get_bus_conf.c2
-rw-r--r--src/northbridge/amd/amdfam10/debug.c4
-rw-r--r--src/northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c2
3 files changed, 3 insertions, 5 deletions
diff --git a/src/mainboard/supermicro/h8qme_fam10/get_bus_conf.c b/src/mainboard/supermicro/h8qme_fam10/get_bus_conf.c
index 2ee436b9e7..117b08735e 100644
--- a/src/mainboard/supermicro/h8qme_fam10/get_bus_conf.c
+++ b/src/mainboard/supermicro/h8qme_fam10/get_bus_conf.c
@@ -25,7 +25,7 @@
#include <string.h>
#include <stdint.h>
#if CONFIG_LOGICAL_CPUS==1
-#include <cpu/amd/quadcore.h>
+#include <cpu/amd/multicore.h>
#endif
#include <cpu/amd/amdfam10_sysconf.h>
diff --git a/src/northbridge/amd/amdfam10/debug.c b/src/northbridge/amd/amdfam10/debug.c
index 328de7e289..a7007357c0 100644
--- a/src/northbridge/amd/amdfam10/debug.c
+++ b/src/northbridge/amd/amdfam10/debug.c
@@ -23,8 +23,6 @@
#include "amdfam10_pci.c"
-static void udelay_tsc(u32 us);
-
static inline void print_debug_addr(const char *str, void *val)
{
#if CACHE_AS_RAM_ADDRESS_DEBUG == 1
@@ -296,7 +294,7 @@ static inline void dump_io_resources(u32 port)
{
int i;
- udelay_tsc(2000);
+ udelay(2000);
printk(BIOS_DEBUG, "%04x:\n", port);
for(i=0;i<256;i++) {
u8 val;
diff --git a/src/northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c b/src/northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c
index a7a69b338c..b79448ec14 100644
--- a/src/northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c
+++ b/src/northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c
@@ -42,7 +42,7 @@ static void wait_till_sysinfo_in_ram(void)
/* give the NB a break, many CPUs spinning on one bit makes a
* lot of traffic and time is not too important to APs.
*/
- udelay_tsc(1000);
+ udelay(1000);
if(get_htic_bit(0, 9)) return;
}
}