diff options
| -rw-r--r-- | src/northbridge/amd/amdfam10/amdfam10.h | 7 | ||||
| -rw-r--r-- | src/northbridge/amd/amdht/h3finit.c | 40 | ||||
| -rw-r--r-- | src/northbridge/amd/amdht/h3finit.h | 3 | ||||
| -rw-r--r-- | src/northbridge/amd/amdht/ht_wrapper.c | 3 |
4 files changed, 49 insertions, 4 deletions
diff --git a/src/northbridge/amd/amdfam10/amdfam10.h b/src/northbridge/amd/amdfam10/amdfam10.h index 96f182da30..a77d036aa8 100644 --- a/src/northbridge/amd/amdfam10/amdfam10.h +++ b/src/northbridge/amd/amdfam10/amdfam10.h @@ -1,6 +1,7 @@ /* * This file is part of the coreboot project. * + * Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering * Copyright (C) 2007 Advanced Micro Devices, Inc. * * This program is free software; you can redistribute it and/or modify @@ -1002,6 +1003,10 @@ struct nodes_info_t { u32 up_planes; // down planes will be [up_planes, planes) } __attribute__((packed)); +struct ht_link_config { + uint8_t ht_speed_limit; // Speed in MHz; 0 for autodetect (default) +}; + /* be careful with the alignment of sysinfo, bacause sysinfo may be shared by coreboot_car and ramstage stage. and ramstage may be running at 64bit later.*/ struct sys_info { @@ -1015,6 +1020,8 @@ struct sys_info { u8 host_link_freq[NODE_NUMS*8]; // record freq for every link from cpu, 0x0f means don't need to touch it u16 host_link_freq_cap[NODE_NUMS*8]; //cap + struct ht_link_config ht_link_cfg; + u32 segbit; u32 sbdn; u32 sblk; diff --git a/src/northbridge/amd/amdht/h3finit.c b/src/northbridge/amd/amdht/h3finit.c index 4059182c54..47bf80972f 100644 --- a/src/northbridge/amd/amdht/h3finit.c +++ b/src/northbridge/amd/amdht/h3finit.c @@ -75,6 +75,41 @@ static const uint16_t ht_speed_limit[16] = 0x00FF, 0x007F, 0x003F, 0x001F, 0x000F, 0x0007, 0x0003, 0x0001}; +static const struct ht_speed_limit_map_t { + uint16_t mhz; + uint8_t config; +} ht_speed_limit_map[] = { + {0, NVRAM_LIMIT_HT_SPEED_AUTO}, + {200, NVRAM_LIMIT_HT_SPEED_200}, + {300, NVRAM_LIMIT_HT_SPEED_300}, + {400, NVRAM_LIMIT_HT_SPEED_400}, + {500, NVRAM_LIMIT_HT_SPEED_500}, + {600, NVRAM_LIMIT_HT_SPEED_600}, + {800, NVRAM_LIMIT_HT_SPEED_800}, + {1000, NVRAM_LIMIT_HT_SPEED_1000}, + {1200, NVRAM_LIMIT_HT_SPEED_1200}, + {1400, NVRAM_LIMIT_HT_SPEED_1400}, + {1600, NVRAM_LIMIT_HT_SPEED_1600}, + {1800, NVRAM_LIMIT_HT_SPEED_1800}, + {2000, NVRAM_LIMIT_HT_SPEED_2000}, + {2200, NVRAM_LIMIT_HT_SPEED_2200}, + {2400, NVRAM_LIMIT_HT_SPEED_2400}, + {2600, NVRAM_LIMIT_HT_SPEED_2600}, +}; + +static const uint16_t ht_speed_mhz_to_hw(uint16_t mhz) +{ + size_t i; + for (i = 0; i < ARRAY_SIZE(ht_speed_limit_map); i++) + if (ht_speed_limit_map[i].mhz == mhz) + return ht_speed_limit_map[i].config; + + printk(BIOS_WARNING, + "WARNING: Invalid HT link limit frequency %d specified, ignoring...\n", + mhz); + return ht_speed_limit[NVRAM_LIMIT_HT_SPEED_AUTO]; +} + /*---------------------------------------------------------------------------- * TYPEDEFS AND STRUCTURES * @@ -1359,10 +1394,9 @@ static void selectOptimalWidthAndFrequency(sMainData *pDat) for (i = 0; i < pDat->TotalLinks*2; i += 2) { - /* FIXME - * Mainboards need to be able to set cbPCBFreqLimit - */ cbPCBFreqLimit = 0xFFFF; // Maximum allowed by autoconfiguration + if (pDat->HtBlock->ht_link_configuration) + cbPCBFreqLimit = ht_speed_mhz_to_hw(pDat->HtBlock->ht_link_configuration->ht_speed_limit); cbPCBFreqLimit = min(cbPCBFreqLimit, cbPCBFreqLimit_NVRAM); #if CONFIG_EXPERT && CONFIG_LIMIT_HT_DOWN_WIDTH_8 diff --git a/src/northbridge/amd/amdht/h3finit.h b/src/northbridge/amd/amdht/h3finit.h index 136a5cf735..a56c2464e3 100644 --- a/src/northbridge/amd/amdht/h3finit.h +++ b/src/northbridge/amd/amdht/h3finit.h @@ -1,6 +1,7 @@ /* * This file is part of the coreboot project. * + * Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering * Copyright (C) 2007 Advanced Micro Devices, Inc. * * This program is free software; you can redistribute it and/or modify @@ -462,6 +463,8 @@ typedef struct { const u8 *pEventData0 ); + const struct ht_link_config *ht_link_configuration; + } AMD_HTBLOCK; /* diff --git a/src/northbridge/amd/amdht/ht_wrapper.c b/src/northbridge/amd/amdht/ht_wrapper.c index 3bf81c6bc4..a38caa463e 100644 --- a/src/northbridge/amd/amdht/ht_wrapper.c +++ b/src/northbridge/amd/amdht/ht_wrapper.c @@ -139,7 +139,8 @@ static void amd_ht_init(struct sys_info *sysinfo) NULL, // BOOL (*AMD_CB_CustomizeBuffers)(); NULL, // void (*AMD_CB_OverrideDevicePort)(); NULL, // void (*AMD_CB_OverrideCpuPort)(); - AMD_CB_EventNotify // void (*AMD_CB_EventNotify) (); + AMD_CB_EventNotify, // void (*AMD_CB_EventNotify) (); + &sysinfo->ht_link_cfg // struct ht_link_config* }; printk(BIOS_DEBUG, "Enter amd_ht_init()\n"); |