diff options
| -rw-r--r-- | src/mainboard/tyan/s1846/auto.c | 8 | ||||
| -rw-r--r-- | src/northbridge/intel/i440bx/raminit.c | 4 |
2 files changed, 5 insertions, 7 deletions
diff --git a/src/mainboard/tyan/s1846/auto.c b/src/mainboard/tyan/s1846/auto.c index 35acfe94ff..c4871d7710 100644 --- a/src/mainboard/tyan/s1846/auto.c +++ b/src/mainboard/tyan/s1846/auto.c @@ -101,10 +101,10 @@ static void main(unsigned long bist) * Do _not_ check the area from 640 KB - 1 MB, as that's not really * RAM, but rather reserved for various other things: * - * - 640 KB 768 KB: Video Buffer Area - * - 768 KB 896 KB: Expansion Area - * - 896 KB 960 KB: Extended System BIOS Area - * - 960 KB 1 MB: Memory (BIOS Area) - System BIOS Area + * - 640 KB - 768 KB: Video Buffer Area + * - 768 KB - 896 KB: Expansion Area + * - 896 KB - 960 KB: Extended System BIOS Area + * - 960 KB - 1 MB: Memory (BIOS Area) - System BIOS Area * * Trying to check these areas will fail. */ diff --git a/src/northbridge/intel/i440bx/raminit.c b/src/northbridge/intel/i440bx/raminit.c index 548444e337..08219741f0 100644 --- a/src/northbridge/intel/i440bx/raminit.c +++ b/src/northbridge/intel/i440bx/raminit.c @@ -242,7 +242,7 @@ static const long register_values[] = { RPS, 0x0000, 0x0000, /* SDRAMC - SDRAM Control Register - * 0x76-0x77 + * 0x76 - 0x77 * * [15:10] Reserved * [09:08] Idle/Pipeline DRAM Leadoff Timing (IPDLT) @@ -519,8 +519,6 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl) /* 4. Mode register set. Wait two memory cycles. */ PRINT_DEBUG("RAM Enable 4: Mode register set\r\n"); do_ram_command(ctrl, RAM_COMMAND_MRS, 0x1d0); - // TODO: Is 0x1d0 correct? - // do_ram_command(ctrl, RAM_COMMAND_MRS, 0x1d0000); mdelay(10); mdelay(10); |