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-rw-r--r--src/mainboard/google/zoombini/variants/baseboard/include/baseboard/gpio.h2
-rw-r--r--src/mainboard/google/zoombini/variants/meowth/gpio.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/zoombini/variants/baseboard/include/baseboard/gpio.h b/src/mainboard/google/zoombini/variants/baseboard/include/baseboard/gpio.h
index ea48e62c57..f1460d2cbf 100644
--- a/src/mainboard/google/zoombini/variants/baseboard/include/baseboard/gpio.h
+++ b/src/mainboard/google/zoombini/variants/baseboard/include/baseboard/gpio.h
@@ -29,7 +29,7 @@
#define GPIO_EC_IN_RW GPP_A8
/* BIOS Flash Write Protect */
-#define GPIO_PCH_WP GPP_A1
+#define GPIO_PCH_WP GPP_H12
/* EC wake is LAN_WAKE# which is a special DeepSX wake pin */
#define GPE_EC_WAKE GPE0_LAN_WAK
diff --git a/src/mainboard/google/zoombini/variants/meowth/gpio.c b/src/mainboard/google/zoombini/variants/meowth/gpio.c
index e0eaa9d259..3e43add685 100644
--- a/src/mainboard/google/zoombini/variants/meowth/gpio.c
+++ b/src/mainboard/google/zoombini/variants/meowth/gpio.c
@@ -226,7 +226,7 @@ static const struct pad_config gpio_table[] = {
NF1), /* PCH_RCAM_SAR0_I2C5_SDA */
/* I2C5_SCL */ PAD_CFG_NF(GPP_H11, NONE, DEEP,
NF1), /* PCH_RCAM_SAR0_I2C5_SCL */
-/* M2_SKT2_CFG0 */ PAD_NC(GPP_H12, NONE),
+/* M2_SKT2_CFG0 */ PAD_CFG_GPI(GPP_H12, NONE, DEEP), /* PCH_WP_OD */
/* M2_SKT2_CFG1 */ PAD_NC(GPP_H13, NONE),
/* M2_SKT2_CFG2 */ PAD_NC(GPP_H14, NONE),
/* M2_SKT2_CFG3 */ PAD_NC(GPP_H15, NONE),