diff options
| -rw-r--r-- | src/southbridge/amd/agesa/hudson/Makefile.inc | 3 | ||||
| -rw-r--r-- | src/southbridge/amd/agesa/hudson/enable_usbdebug.c | 8 | ||||
| -rw-r--r-- | src/southbridge/amd/cimx/sb800/Makefile.inc | 3 | ||||
| -rw-r--r-- | src/southbridge/amd/sb800/enable_usbdebug.c | 8 |
4 files changed, 17 insertions, 5 deletions
diff --git a/src/southbridge/amd/agesa/hudson/Makefile.inc b/src/southbridge/amd/agesa/hudson/Makefile.inc index 0d4b73929b..c9a1731a65 100644 --- a/src/southbridge/amd/agesa/hudson/Makefile.inc +++ b/src/southbridge/amd/agesa/hudson/Makefile.inc @@ -9,7 +9,8 @@ ramstage-y += pci.c ramstage-y += pcie.c ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.c ramstage-y += reset.c -romstage-y += enable_usbdebug.c +romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c romstage-y += early_setup.c ramstage-$(CONFIG_HAVE_ACPI_RESUME) += spi.c diff --git a/src/southbridge/amd/agesa/hudson/enable_usbdebug.c b/src/southbridge/amd/agesa/hudson/enable_usbdebug.c index c558a2698a..85ac8d7ba1 100644 --- a/src/southbridge/amd/agesa/hudson/enable_usbdebug.c +++ b/src/southbridge/amd/agesa/hudson/enable_usbdebug.c @@ -45,8 +45,12 @@ void set_debug_port(unsigned int port) void enable_usbdebug(unsigned int port) { - pci_write_config32(PCI_DEV(0, HUDSON_DEVN_BASE + 0x13, 5), + /* Enable all of the USB controllers */ + outb(0xEF, PM_INDEX); + outb(0x7F, PM_DATA); + + pci_write_config32(PCI_DEV(0, HUDSON_DEVN_BASE + 0x12, 2), EHCI_BAR_INDEX, CONFIG_EHCI_BAR); - pci_write_config8(PCI_DEV(0, HUDSON_DEVN_BASE + 0x13, 5), 0x04, 0x2); /* mem space enabe */ + pci_write_config8(PCI_DEV(0, HUDSON_DEVN_BASE + 0x12, 2), 0x04, 0x6); /* mem space enabe */ set_debug_port(port); } diff --git a/src/southbridge/amd/cimx/sb800/Makefile.inc b/src/southbridge/amd/cimx/sb800/Makefile.inc index 064cbc7122..de9b9797b1 100644 --- a/src/southbridge/amd/cimx/sb800/Makefile.inc +++ b/src/southbridge/amd/cimx/sb800/Makefile.inc @@ -32,6 +32,9 @@ ramstage-$(CONFIG_SB800_IMC_FAN_CONTROL) += fan.c ramstage-$(CONFIG_HAVE_ACPI_RESUME) += spi.c ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.c +romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c + ramstage-y += smbus.c ramstage-y += lpc.c diff --git a/src/southbridge/amd/sb800/enable_usbdebug.c b/src/southbridge/amd/sb800/enable_usbdebug.c index 174b0f2aa5..158032e635 100644 --- a/src/southbridge/amd/sb800/enable_usbdebug.c +++ b/src/southbridge/amd/sb800/enable_usbdebug.c @@ -45,8 +45,12 @@ void set_debug_port(unsigned int port) void enable_usbdebug(unsigned int port) { - pci_write_config32(PCI_DEV(0, SB800_DEVN_BASE + 0x13, 5), + /* Enable all of the USB controllers */ + outb(0xEF, PM_INDEX); + outb(0x7F, PM_DATA); + + pci_write_config32(PCI_DEV(0, SB800_DEVN_BASE + 0x12, 2), EHCI_BAR_INDEX, CONFIG_EHCI_BAR); - pci_write_config8(PCI_DEV(0, SB800_DEVN_BASE + 0x13, 5), 0x04, 0x2); /* mem space enabe */ + pci_write_config8(PCI_DEV(0, SB800_DEVN_BASE + 0x12, 2), 0x04, 0x6); /* mem space enabe */ set_debug_port(port); } |