diff options
| -rw-r--r-- | src/mainboard/advansus/a785e-i/Makefile.inc | 3 | ||||
| -rw-r--r-- | src/mainboard/advansus/a785e-i/romstage.c | 7 | ||||
| -rw-r--r-- | src/mainboard/asus/m5a88-v/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/mainboard/asus/m5a88-v/romstage.c | 7 | ||||
| -rw-r--r-- | src/mainboard/avalue/eax-785e/Makefile.inc | 3 | ||||
| -rw-r--r-- | src/mainboard/avalue/eax-785e/romstage.c | 8 |
6 files changed, 3 insertions, 26 deletions
diff --git a/src/mainboard/advansus/a785e-i/Makefile.inc b/src/mainboard/advansus/a785e-i/Makefile.inc index d69a9bf869..d7290afedd 100644 --- a/src/mainboard/advansus/a785e-i/Makefile.inc +++ b/src/mainboard/advansus/a785e-i/Makefile.inc @@ -1,5 +1,4 @@ -#romstage-y += reset.c #FIXME romstage have include test_rest.c - +romstage-y += reset.c ramstage-y += reset.c #SB800 CIMx share AGESA V5 lib code diff --git a/src/mainboard/advansus/a785e-i/romstage.c b/src/mainboard/advansus/a785e-i/romstage.c index ae283a4a3d..1a4a27635b 100644 --- a/src/mainboard/advansus/a785e-i/romstage.c +++ b/src/mainboard/advansus/a785e-i/romstage.c @@ -72,14 +72,7 @@ static int spd_read_byte(u32 device, u32 address) #include "cpu/amd/model_10xxx/init_cpus.c" #include "northbridge/amd/amdfam10/early_ht.c" #include "spd.h" - #include <reset.h> -void soft_reset(void) -{ - set_bios_reset(); - /* link reset */ - outb(0x06, 0x0cf9); -} void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { diff --git a/src/mainboard/asus/m5a88-v/Makefile.inc b/src/mainboard/asus/m5a88-v/Makefile.inc index 35b20430c6..d7290afedd 100644 --- a/src/mainboard/asus/m5a88-v/Makefile.inc +++ b/src/mainboard/asus/m5a88-v/Makefile.inc @@ -1,3 +1,4 @@ +romstage-y += reset.c ramstage-y += reset.c #SB800 CIMx share AGESA V5 lib code diff --git a/src/mainboard/asus/m5a88-v/romstage.c b/src/mainboard/asus/m5a88-v/romstage.c index dbae2d35f1..ddb0e6fe85 100644 --- a/src/mainboard/asus/m5a88-v/romstage.c +++ b/src/mainboard/asus/m5a88-v/romstage.c @@ -72,14 +72,7 @@ static int spd_read_byte(u32 device, u32 address) #include "cpu/amd/model_10xxx/init_cpus.c" #include "northbridge/amd/amdfam10/early_ht.c" #include "spd.h" - #include <reset.h> -void soft_reset(void) -{ - set_bios_reset(); - /* link reset */ - outb(0x06, 0x0cf9); -} #define SERIAL_DEV PNP_DEV(0x4e, IT8721F_SP1) void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) diff --git a/src/mainboard/avalue/eax-785e/Makefile.inc b/src/mainboard/avalue/eax-785e/Makefile.inc index d69a9bf869..d7290afedd 100644 --- a/src/mainboard/avalue/eax-785e/Makefile.inc +++ b/src/mainboard/avalue/eax-785e/Makefile.inc @@ -1,5 +1,4 @@ -#romstage-y += reset.c #FIXME romstage have include test_rest.c - +romstage-y += reset.c ramstage-y += reset.c #SB800 CIMx share AGESA V5 lib code diff --git a/src/mainboard/avalue/eax-785e/romstage.c b/src/mainboard/avalue/eax-785e/romstage.c index d4704e8029..5af67f706f 100644 --- a/src/mainboard/avalue/eax-785e/romstage.c +++ b/src/mainboard/avalue/eax-785e/romstage.c @@ -72,15 +72,7 @@ static int spd_read_byte(u32 device, u32 address) #include "cpu/amd/model_10xxx/init_cpus.c" #include "northbridge/amd/amdfam10/early_ht.c" #include "spd.h" - #include <reset.h> -void soft_reset(void) -{ - set_bios_reset(); - /* link reset */ - outb(0x06, 0x0cf9); -} - void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { |