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Diffstat (limited to 'Documentation/mainboard')
-rw-r--r-- | Documentation/mainboard/index.md | 4 | ||||
-rw-r--r-- | Documentation/mainboard/opencellular/elgon.md | 72 | ||||
-rw-r--r-- | Documentation/mainboard/opencellular/elgon1.png | bin | 0 -> 813773 bytes | |||
-rw-r--r-- | Documentation/mainboard/opencellular/elgon2.png | bin | 0 -> 730981 bytes |
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diff --git a/Documentation/mainboard/index.md b/Documentation/mainboard/index.md index 6c75ea28c6..45eb217e4d 100644 --- a/Documentation/mainboard/index.md +++ b/Documentation/mainboard/index.md @@ -18,6 +18,10 @@ This section contains documentation about coreboot on specific mainboards. - [GA-H61M-S2PV](gigabyte/ga-h61m-s2pv.md) +## Open Cellular + +- [Elgon](opencellular/elgon.md) + ## HP - [Compaq 8200 Elite SFF](hp/compaq_8200_sff.md) diff --git a/Documentation/mainboard/opencellular/elgon.md b/Documentation/mainboard/opencellular/elgon.md new file mode 100644 index 0000000000..37d05e64f5 --- /dev/null +++ b/Documentation/mainboard/opencellular/elgon.md @@ -0,0 +1,72 @@ +# Elgon + +This page describes how to run coreboot on the [Elgon] compute board +from [OpenCellular]. + +## TODO + +* Add hard reset control + +## Flashing coreboot + +```eval_rst ++---------------------+------------+ +| Type | Value | ++=====================+============+ +| Socketed flash | no | ++---------------------+------------+ +| Model | W25Q128 | ++---------------------+------------+ +| Size | 16 MiB | ++---------------------+------------+ +| In circuit flashing | yes | ++---------------------+------------+ +| Package | SOIC-8 | ++---------------------+------------+ +| Write protection | No | ++---------------------+------------+ +| Dual BIOS feature | No | ++---------------------+------------+ +| Internal flashing | yes | ++---------------------+------------+ +``` + +### Internal programming + +The SPI flash can be accessed using [flashrom]. + +### External programming + +The EVT board does have a pinheader to flash the SOIC-8 in circuit. +Directly connecting a Pomona test-clip on the flash is also possible. + +TODO: pinout + +**Total board view of EVT** + +![][elgon1] + +[elgon1]: elgon1.png + +**Closeup view of SOIC-8 flash IC, programming pin header and +USB serial connector of EVT** + +![][elgon2] + +[elgon2]: elgon2.png + +## Technology + +```eval_rst ++---------------+----------------------------------------+ +| SoC | :doc:`../../soc/cavium/cn81xx/index` | ++---------------+----------------------------------------+ +| CPU | Cavium ARMv8-Quadcore `CN81XX`_ | ++---------------+----------------------------------------+ + +.. _CN81XX: https://www.cavium.com/product-octeon-tx-cn80xx-81xx.html +``` + +[Elgon]: https://github.com/Telecominfraproject/OpenCellular +[OpenCellular]: https://code.fb.com/connectivity/introducing-opencellular-an-open-source-wireless-access-platform/ +[flashrom]: https://flashrom.org/Flashrom diff --git a/Documentation/mainboard/opencellular/elgon1.png b/Documentation/mainboard/opencellular/elgon1.png Binary files differnew file mode 100644 index 0000000000..c1eb5441f4 --- /dev/null +++ b/Documentation/mainboard/opencellular/elgon1.png diff --git a/Documentation/mainboard/opencellular/elgon2.png b/Documentation/mainboard/opencellular/elgon2.png Binary files differnew file mode 100644 index 0000000000..f12a734919 --- /dev/null +++ b/Documentation/mainboard/opencellular/elgon2.png |