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-rw-r--r--Documentation/northbridge/intel/haswell/index.md4
-rw-r--r--Documentation/northbridge/intel/haswell/known-issues.md28
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diff --git a/Documentation/northbridge/intel/haswell/index.md b/Documentation/northbridge/intel/haswell/index.md
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--- a/Documentation/northbridge/intel/haswell/index.md
+++ b/Documentation/northbridge/intel/haswell/index.md
@@ -6,3 +6,7 @@ coreboot.
## Proprietary blobs
- [mrc.bin](mrc.bin.md)
+
+## Issues
+
+- [Known issues](known-issues.md)
diff --git a/Documentation/northbridge/intel/haswell/known-issues.md b/Documentation/northbridge/intel/haswell/known-issues.md
new file mode 100644
index 0000000000..c684b8fd65
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@@ -0,0 +1,28 @@
+# Known issues with Haswell
+
+These issues are specific to the Haswell architecture. For a given
+mainboard, there might be additional issues to those listed here.
+
+## PCIe graphics
+
+```eval_rst
+Using a PCIe graphics card for display output is not currently
+supported. This is because :doc:`./mrc.bin` requires workarounds to
+have such a feature working correctly.
+```
+
+However, there is a [patch on Gerrit][hsw-gfx-gerrit] that allows PCIe
+graphics to be used for display output. This patch is not guaranteed to
+be of the same level of quality as code committed to coreboot.
+
+Still, in some cases, a PCIe graphics card can be used for rendering,
+while the integrated graphics device is used for display output. This
+can be achieved under GNU/Linux by using [PRIME GPU offloading][PRIME].
+
+## PCIe 3.0
+
+Only PCIe 2.0 has been tested so far. PCIe 3.0 could potentially have
+stability issues.
+
+[PRIME]: https://wiki.archlinux.org/index.php/PRIME
+[hsw-gfx-gerrit]: https://review.coreboot.org/c/30456