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Diffstat (limited to 'Documentation/soc/intel')
| -rw-r--r-- | Documentation/soc/intel/fsp/index.md | 4 | ||||
| -rw-r--r-- | Documentation/soc/intel/fsp/ppi/ppi.md | 9 |
2 files changed, 13 insertions, 0 deletions
diff --git a/Documentation/soc/intel/fsp/index.md b/Documentation/soc/intel/fsp/index.md index 039a389b46..d7f44c6dee 100644 --- a/Documentation/soc/intel/fsp/index.md +++ b/Documentation/soc/intel/fsp/index.md @@ -11,3 +11,7 @@ This section contains documentation about Intel-FSP in public domain. * [FSP Specification 1.1](https://www.intel.com/content/dam/www/public/us/en/documents/technical-specifications/fsp-architecture-spec-v1-1.pdf) * [FSP Specification 2.0](https://www.intel.com/content/dam/www/public/us/en/documents/technical-specifications/fsp-architecture-spec-v2.pdf) + +## Additional Features in FSP 2.1 specification + +- [PPI](ppi/ppi.md) diff --git a/Documentation/soc/intel/fsp/ppi/ppi.md b/Documentation/soc/intel/fsp/ppi/ppi.md new file mode 100644 index 0000000000..66dbf07c16 --- /dev/null +++ b/Documentation/soc/intel/fsp/ppi/ppi.md @@ -0,0 +1,9 @@ +# PEIM to PEIM Interface (PPI) + +This section is intended to document the purpose of creating PPI service +inside coreboot space to perform some specific operation related to CPU, +chipset using Intel FSP. This feature is added into FSP specification 2.1 +where FSP should be able to locate PPI, published by boot firmware and +able to execute the same in FSP's context. + +* [What is PPI](https://www.intel.com/content/dam/www/public/us/en/documents/reference-guides/efi-pei-cis-v09.pdf) |