diff options
Diffstat (limited to 'payloads/libpayload/include/mips')
| -rw-r--r-- | payloads/libpayload/include/mips/arch/byteorder.h | 43 | ||||
| -rw-r--r-- | payloads/libpayload/include/mips/arch/cache.h | 98 | ||||
| -rw-r--r-- | payloads/libpayload/include/mips/arch/cpu.h | 85 | ||||
| -rw-r--r-- | payloads/libpayload/include/mips/arch/exception.h | 90 | ||||
| -rw-r--r-- | payloads/libpayload/include/mips/arch/io.h | 67 | ||||
| -rw-r--r-- | payloads/libpayload/include/mips/arch/stdint.h | 95 | ||||
| -rw-r--r-- | payloads/libpayload/include/mips/arch/types.h | 76 | ||||
| -rw-r--r-- | payloads/libpayload/include/mips/arch/virtual.h | 31 |
8 files changed, 585 insertions, 0 deletions
diff --git a/payloads/libpayload/include/mips/arch/byteorder.h b/payloads/libpayload/include/mips/arch/byteorder.h new file mode 100644 index 0000000000..002451accc --- /dev/null +++ b/payloads/libpayload/include/mips/arch/byteorder.h @@ -0,0 +1,43 @@ +/* + * This file is part of the libpayload project. + * + * Copyright (C) 2014 Imagination Technologies + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef __MIPS_ARCH_BYTEORDER_H__ +#define __MIPS_ARCH_BYTEORDER_H__ + +#include <stdint.h> +#include <swab.h> + +#ifndef __ORDER_LITTLE_ENDIAN__ +#error "What endian are you!?" +#endif + +#define cpu_to_le64(x) ((uint64_t)(x)) +#define le64_to_cpu(x) ((uint64_t)(x)) +#define cpu_to_le32(x) ((uint32_t)(x)) +#define le32_to_cpu(x) ((uint32_t)(x)) +#define cpu_to_le16(x) ((uint16_t)(x)) +#define le16_to_cpu(x) ((uint16_t)(x)) +#define cpu_to_be64(x) swab64(x) +#define be64_to_cpu(x) swab64(x) +#define cpu_to_be32(x) swab32((x)) +#define be32_to_cpu(x) swab32((x)) +#define cpu_to_be16(x) swab16((x)) +#define be16_to_cpu(x) swab16((x)) + +#endif /* __MIPS_ARCH_BYTEORDER_H__ */ diff --git a/payloads/libpayload/include/mips/arch/cache.h b/payloads/libpayload/include/mips/arch/cache.h new file mode 100644 index 0000000000..9485671e98 --- /dev/null +++ b/payloads/libpayload/include/mips/arch/cache.h @@ -0,0 +1,98 @@ +/* + * This file is part of the libpayload project. + * + * Copyright (C) 2014 Imagination Technologies + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef __MIPS_ARCH_CACHE_H__ +#define __MIPS_ARCH_CACHE_H__ + + +#include <stddef.h> +#include <stdint.h> + + +/* + * Sync primitives + */ + +/* data memory barrier */ +static inline void dmb(void) +{ + /* TODO */ +} + +/* data sync barrier */ +static inline void dsb(void) +{ + /* TODO */ +} + +/* instruction sync barrier */ +static inline void isb(void) +{ + /* TODO */ +} + + +/* + * Cache maintenance API + */ + +/* dcache clean and invalidate all */ +void dcache_clean_invalidate_all(void); + +/* dcache clean all */ +void dcache_clean_all(void); + +/* dcache invalidate all (on current level given by CCSELR) */ +void dcache_invalidate_all(void); + +/* returns number of bytes per cache line */ +unsigned int dcache_line_bytes(void); + +/* dcache and MMU disable */ +void dcache_mmu_disable(void); + +/* dcache and MMU enable */ +void dcache_mmu_enable(void); + +/* perform all icache/dcache maintenance needed after loading new code */ +void cache_sync_instructions(void); + +/* tlb invalidate all */ +void tlb_invalidate_all(void); + +/* + * Generalized setup/init functions + */ + +/* mmu initialization (set page table address, set permissions, etc) */ +void mmu_init(void); + +enum dcache_policy { + DCACHE_OFF, + DCACHE_WRITEBACK, + DCACHE_WRITETHROUGH, +}; + +/* disable the mmu for a range. Primarily useful to lock out address 0. */ +void mmu_disable_range(unsigned long start_mb, unsigned long size_mb); +/* mmu range configuration (set dcache policy) */ +void mmu_config_range(unsigned long start_mb, unsigned long size_mb, + enum dcache_policy policy); + +#endif /* __MIPS_ARCH_CACHE_H__ */ diff --git a/payloads/libpayload/include/mips/arch/cpu.h b/payloads/libpayload/include/mips/arch/cpu.h new file mode 100644 index 0000000000..952ec7c528 --- /dev/null +++ b/payloads/libpayload/include/mips/arch/cpu.h @@ -0,0 +1,85 @@ +/* + * This file is part of the libpayload project. + * + * Copyright (C) 2014 Imagination Technologies + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __MIPS_ARCH_CPU_H__ +#define __MIPS_ARCH_CPU_H__ + +/* + * Reading at this address allows to identify the platform the code is running + * on + */ +#define IMG_PLATFORM_ID() (*((unsigned *)0xB8149060)) +#define IMG_PLATFORM_ID_SILICON 0xF00D0006 + +#define CP0_COUNT 9 +#define CP0_COMPARE 11 +#define CP0_STATUS 12 +#define CP0_CAUSE 13 +#define CP0_WATCHLO 18 +#define CP0_WATCHHI 19 + +/* coprocessor 0 enable */ +#define ST0_CU0 (1 << 28) +#define C0_CAUSE_DC (1 << 27) + +/*************************************************************************** + * The following section was copied from arch/mips/include/asm/mipsregs.h in + * the 3.14 kernel tree. + */ + +/* + * Macros to access the system control coprocessor + */ + +#define __read_32bit_c0_register(source, sel) \ +({ int __res; \ + if (sel == 0) \ + __asm__ __volatile__( \ + "mfc0\t%0, " #source "\n\t" \ + : "=r" (__res)); \ + else \ + __asm__ __volatile__( \ + ".set\tmips32\n\t" \ + "mfc0\t%0, " #source ", " #sel "\n\t" \ + ".set\tmips0\n\t" \ + : "=r" (__res)); \ + __res; \ +}) + +#define __write_32bit_c0_register(register, sel, value) \ +do { \ + if (sel == 0) \ + __asm__ __volatile__( \ + "mtc0\t%z0, " #register "\n\t" \ + : : "Jr" ((unsigned int)(value))); \ + else \ + __asm__ __volatile__( \ + ".set\tmips32\n\t" \ + "mtc0\t%z0, " #register ", " #sel "\n\t" \ + ".set\tmips0" \ + : : "Jr" ((unsigned int)(value))); \ +} while (0) + +/* Shortcuts to access various internal registers, keep adding as needed. */ +#define read_c0_count() __read_32bit_c0_register($9, 0) +#define write_c0_count(val) __write_32bit_c0_register($9, 0, (val)) + +#define read_c0_cause() __read_32bit_c0_register($13, 0) +#define write_c0_cause(val) __write_32bit_c0_register($13, 0, (val)) +/***************************************************************************/ + +#endif /* __MIPS_ARCH_CPU_H__ */ diff --git a/payloads/libpayload/include/mips/arch/exception.h b/payloads/libpayload/include/mips/arch/exception.h new file mode 100644 index 0000000000..9557cb7049 --- /dev/null +++ b/payloads/libpayload/include/mips/arch/exception.h @@ -0,0 +1,90 @@ +/* + * This file is part of the libpayload project. + * + * Copyright (C) 2014 Imagination Technologies + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef __MIPS_ARCH_EXCEPTION_H__ +#define __MIPS_ARCH_EXCEPTION_H__ + +#include <stdint.h> + +void exception_init_asm(void); +void exception_dispatch(void); + +struct exception_state_t { + struct { + /* Always 0: just to keep the series complete */ + u32 zero; + /* Reserved for the assembler */ + /* TODO: is this actually needed here? */ + u32 at; + /* v0-v1: expression evaluation */ + u32 v0; + u32 v1; + /* a0-a3: Arguments */ + u32 a0; + u32 a1; + u32 a2; + u32 a3; + /* t0-t3: Temporary registers for expression evaluation */ + u32 t0; + u32 t1; + u32 t2; + u32 t3; + u32 t4; + u32 t5; + u32 t6; + u32 t7; + /* s0-s7: Saved registers */ + u32 s0; + u32 s1; + u32 s2; + u32 s3; + u32 s4; + u32 s5; + u32 s6; + u32 s7; + /* t8-t9: Temporary registers for expression evaluation */ + u32 t8; + u32 t9; + /* k0-k1: reserved for SO kernel */ + u32 k0; + u32 k1; + /* Global pointer */ + u32 gp; + /* Stack pointer */ + u32 sp; + /* Frame pointer */ + u32 fp; + /* Return address */ + u32 ra; + } regs; + u32 vector; +} __attribute__((packed)); + +extern struct exception_state_t *exception_state_ptr; +extern u32 *exception_stack_end; + +enum { + EXC_CACHE_ERROR = 0, + EXC_TLB_REFILL_AND_ALL = 1, + EXC_INTERRUPT = 2, + EXC_EJTAG_DEBUG = 3, + EXC_COUNT +}; + +#endif /* __MIPS_ARCH_EXCEPTION_H__ */ diff --git a/payloads/libpayload/include/mips/arch/io.h b/payloads/libpayload/include/mips/arch/io.h new file mode 100644 index 0000000000..d2d9338037 --- /dev/null +++ b/payloads/libpayload/include/mips/arch/io.h @@ -0,0 +1,67 @@ +/* + * This file is part of the libpayload project. + * + * Copyright (C) 2014 Imagination Technologies + * + * Based on arch/armv7/include/arch/io.h: + * Copyright 2013 Google Inc. + * Copyright (C) 1996-2000 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef __MIPS_ARCH_IO_H__ +#define __MIPS_ARCH_IO_H__ + +#include <arch/types.h> +#include <arch/cache.h> +#include <arch/byteorder.h> + +#define read8(a) (*(volatile uint8_t *) (a)) +#define read16(a) (*(volatile uint16_t *) (a)) +#define read32(a) (*(volatile uint32_t *) (a)) + +#define write8(v, a) (*(volatile uint8_t *) (a) = (v)) +#define write16(v, a) (*(volatile uint16_t *) (a) = (v)) +#define write32(v, a) (*(volatile uint32_t *) (a) = (v)) + + +/* + * Clear and set bits in one shot. These macros can be used to clear and + * set multiple bits in a register using a single call. These macros can + * also be used to set a multiple-bit bit pattern using a mask, by + * specifying the mask in the 'clear' parameter and the new bit pattern + * in the 'set' parameter. + */ + +#define out_arch(type, endian, a, v) write##type(cpu_to_##endian(v), a) +#define in_arch(type, endian, a) endian##_to_cpu(read##type(a)) + +#define readb(a) read8(a) +#define readw(a) read16(a) +#define readl(a) read32(a) + +#define inb(a) read8(a) +#define inw(a) read16(a) +#define inl(a) read32(a) + +#define writeb(v, a) write8(v, a) +#define writew(v, a) write16(v, a) +#define writel(v, a) write32(v, a) + +#define outb(v, a) write8(v, a) +#define outw(v, a) write16(v, a) +#define outl(v, a) write32(v, a) + +#endif /* __MIPS_ARCH_IO_H__ */ diff --git a/payloads/libpayload/include/mips/arch/stdint.h b/payloads/libpayload/include/mips/arch/stdint.h new file mode 100644 index 0000000000..c182530862 --- /dev/null +++ b/payloads/libpayload/include/mips/arch/stdint.h @@ -0,0 +1,95 @@ +/* + * This file is part of the libpayload project. + * + * Based on src/arch/armv7/include/stdint.h + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef __MIPS_STDINT_H__ +#define __MIPS_STDINT_H__ + +#if defined(__GNUC__) +#define __HAVE_LONG_LONG__ 1 +#else +#define __HAVE_LONG_LONG__ 0 +#endif + +/* Exact integral types */ +typedef unsigned char uint8_t; +typedef signed char int8_t; + +typedef unsigned short uint16_t; +typedef signed short int16_t; + +typedef unsigned int uint32_t; +typedef signed int int32_t; + +#if __HAVE_LONG_LONG__ +typedef unsigned long long uint64_t; +typedef signed long long int64_t; +#endif + +/* Small types */ +typedef unsigned char uint_least8_t; +typedef signed char int_least8_t; + +typedef unsigned short uint_least16_t; +typedef signed short int_least16_t; + +typedef unsigned int uint_least32_t; +typedef signed int int_least32_t; + +#if __HAVE_LONG_LONG__ +typedef unsigned long long uint_least64_t; +typedef signed long long int_least64_t; +#endif + +/* Fast Types */ +typedef unsigned char uint_fast8_t; +typedef signed char int_fast8_t; + +typedef unsigned int uint_fast16_t; +typedef signed int int_fast16_t; + +typedef unsigned int uint_fast32_t; +typedef signed int int_fast32_t; + +#if __HAVE_LONG_LONG__ +typedef unsigned long long uint_fast64_t; +typedef signed long long int_fast64_t; +#endif + +/* Largest integral types */ +#if __HAVE_LONG_LONG__ +typedef long long int intmax_t; +typedef unsigned long long uintmax_t; +#else +typedef long int intmax_t; +typedef unsigned long int uintmax_t; +#endif + +typedef uint8_t u8; +typedef uint16_t u16; +typedef uint32_t u32; +#if __HAVE_LONG_LONG__ +typedef uint64_t u64; +#endif +typedef int8_t s8; +typedef int16_t s16; +typedef int32_t s32; + +#undef __HAVE_LONG_LONG__ + +#endif /* __MIPS_STDINT_H__ */ diff --git a/payloads/libpayload/include/mips/arch/types.h b/payloads/libpayload/include/mips/arch/types.h new file mode 100644 index 0000000000..151817e679 --- /dev/null +++ b/payloads/libpayload/include/mips/arch/types.h @@ -0,0 +1,76 @@ +/* + * This file is part of the libpayload project. + * + * Copyright (C) 2014 Imagination Technologies + * + * Based on src/arch/armv7/include/arch/types.h + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef __MIPS_ARCH_TYPES_H +#define __MIPS_ARCH_TYPES_H + +#include <arch/stdint.h> + +typedef unsigned short umode_t; + +/* + * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the + * header files exported to user space + */ + +typedef __signed__ char __s8; +typedef unsigned char __u8; + +typedef __signed__ short __s16; +typedef unsigned short __u16; + +typedef __signed__ int __s32; +typedef unsigned int __u32; + +#if defined(__GNUC__) +__extension__ typedef __signed__ long long __s64; +__extension__ typedef unsigned long long __u64; +#endif + +typedef signed char s8; +typedef unsigned char u8; + +typedef signed short s16; +typedef unsigned short u16; + +typedef signed int s32; +typedef unsigned int u32; + +typedef signed long long s64; +typedef unsigned long long u64; + +#define BITS_PER_LONG 32 + +/* Dma addresses are 32-bits wide. */ + +typedef u32 dma_addr_t; + +typedef unsigned long phys_addr_t; +typedef unsigned long phys_size_t; + +typedef long time_t; +typedef long suseconds_t; + +#ifndef NULL +#define NULL ((void *)0) +#endif + +#endif /* __MIPS_ARCH_TYPES_H */ diff --git a/payloads/libpayload/include/mips/arch/virtual.h b/payloads/libpayload/include/mips/arch/virtual.h new file mode 100644 index 0000000000..70aea20b9c --- /dev/null +++ b/payloads/libpayload/include/mips/arch/virtual.h @@ -0,0 +1,31 @@ +/* + * This file is part of the libpayload project. + * + * Copyright (C) 2014 Imagination Technologies + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef __MIPS_ARCH_VIRTUAL_H +#define __MIPS_ARCH_VIRTUAL_H + +extern unsigned long virtual_offset; + +#define virt_to_phys(virt) ((unsigned long) (virt) + virtual_offset) +#define phys_to_virt(phys) ((void *) ((unsigned long) (phys) - virtual_offset)) + +#define virt_to_bus(addr) virt_to_phys(addr) +#define bus_to_virt(addr) phys_to_virt(addr) + +#endif |