diff options
Diffstat (limited to 'src/arch/arm64/armv8/cache.c')
| -rw-r--r-- | src/arch/arm64/armv8/cache.c | 17 |
1 files changed, 9 insertions, 8 deletions
diff --git a/src/arch/arm64/armv8/cache.c b/src/arch/arm64/armv8/cache.c index a0eff46e20..918a883303 100644 --- a/src/arch/arm64/armv8/cache.c +++ b/src/arch/arm64/armv8/cache.c @@ -34,13 +34,14 @@ #include <stdint.h> #include <arch/cache.h> +#include <arch/lib_helpers.h> void tlb_invalidate_all(void) { /* TLBIALL includes dTLB and iTLB on systems that have them. */ - tlbiall(current_el()); - dsb(); - isb(); + tlbiall_current(); + dsb(); + isb(); } unsigned int dcache_line_bytes(void) @@ -51,7 +52,7 @@ unsigned int dcache_line_bytes(void) if (line_bytes) return line_bytes; - ccsidr = read_ccsidr(); + ccsidr = raw_read_ccsidr_el1(); /* [2:0] - Indicates (Log2(number of words in cache line)) - 4 */ line_bytes = 1 << ((ccsidr & 0x7) + 4); /* words per line */ line_bytes *= sizeof(uint32_t); /* bytes per word */ @@ -125,18 +126,18 @@ void dcache_mmu_disable(void) uint32_t sctlr; flush_dcache_all(); - sctlr = read_sctlr(current_el()); + sctlr = raw_read_sctlr_current(); sctlr &= ~(SCTLR_C | SCTLR_M); - write_sctlr(sctlr, current_el()); + raw_write_sctlr_current(sctlr); } void dcache_mmu_enable(void) { uint32_t sctlr; - sctlr = read_sctlr(current_el()); + sctlr = raw_read_sctlr_current(); sctlr |= SCTLR_C | SCTLR_M; - write_sctlr(sctlr, current_el()); + raw_write_sctlr_current(sctlr); } void cache_sync_instructions(void) |