diff options
Diffstat (limited to 'src/arch/arm64/armv8')
-rw-r--r-- | src/arch/arm64/armv8/cache.c | 4 | ||||
-rw-r--r-- | src/arch/arm64/armv8/secmon_loader.c | 3 |
2 files changed, 4 insertions, 3 deletions
diff --git a/src/arch/arm64/armv8/cache.c b/src/arch/arm64/armv8/cache.c index c1dba9259a..d568f261ed 100644 --- a/src/arch/arm64/armv8/cache.c +++ b/src/arch/arm64/armv8/cache.c @@ -144,7 +144,5 @@ void dcache_mmu_enable(void) void cache_sync_instructions(void) { flush_dcache_all(); /* includes trailing DSB (in assembly) */ - iciallu(); /* includes BPIALLU (architecturally) */ - dsb(); - isb(); + icache_invalidate_all(); /* includdes leading DSB and trailing ISB. */ } diff --git a/src/arch/arm64/armv8/secmon_loader.c b/src/arch/arm64/armv8/secmon_loader.c index 7a6e3ee738..d3eda185d1 100644 --- a/src/arch/arm64/armv8/secmon_loader.c +++ b/src/arch/arm64/armv8/secmon_loader.c @@ -22,6 +22,7 @@ * and parameter location for the rmodule. */ +#include <arch/cache.h> #include <arch/lib_helpers.h> #include <arch/secmon.h> #include <arch/spintable.h> @@ -106,6 +107,8 @@ static void secmon_start(void *arg) scr |= SCR_NS; raw_write_scr_el3(scr); + /* Invalidate instruction cache. Necessary for non-BSP. */ + icache_invalidate_all(); entry(p); } |