3 files changed, 26 insertions, 14 deletions
diff --git a/src/arch/arm64/include/arch/psci.h b/src/arch/arm64/include/arch/psci.h
index 32a32b1345..555333a44d 100644
--- a/src/arch/arm64/include/arch/psci.h
+++ b/src/arch/arm64/include/arch/psci.h
@@ -187,10 +187,13 @@ static inline void psci64_return(struct psci_func *pf, int64_t val)
 	psci64_result(pf, 0, val);
 }
 
-void psci_init(void);
+void psci_init(uintptr_t cpu_on_entry);
+void psci_soc_init(uintptr_t cpu_on_entry);
 
 /* Turn on the current CPU within the PSCI subsystem. */
 void psci_turn_on_self(const struct cpu_action *action);
 int psci_turn_off_self(void);
+/* Entry point for CPUs just turning on or waking up. */
+void psci_cpu_entry(void);
 
 #endif /* __ARCH_PSCI_H__ */
diff --git a/src/arch/arm64/include/arch/stages.h b/src/arch/arm64/include/arch/stages.h
index fd633e484f..c3f4e6e25f 100644
--- a/src/arch/arm64/include/arch/stages.h
+++ b/src/arch/arm64/include/arch/stages.h
@@ -33,17 +33,4 @@ void jmp_to_elf_entry(void *entry, unsigned long buffer, unsigned long size);
  * be available to be used (such as console). */
 void arm64_soc_init(void);
 
-/*
- * Stages and rmodules have 2 entry points: BSP and non-BSP. Provided
- * a pointer the correct non-BSP entry point will be returned. The
- * first instruction is for BSP and the 2nd is for non-BSP. Instructions
- * are all 32-bit on arm64.
- */
-static inline void *secondary_entry_point(void *e)
-{
-	uintptr_t nonbsp = (uintptr_t)e;
-
-	return (void *)(nonbsp + sizeof(uint32_t));
-}
-
 #endif
diff --git a/src/arch/arm64/include/armv8/arch/cpu.h b/src/arch/arm64/include/armv8/arch/cpu.h
index c6ca7d38c6..d968a06fe4 100644
--- a/src/arch/arm64/include/armv8/arch/cpu.h
+++ b/src/arch/arm64/include/armv8/arch/cpu.h
@@ -148,4 +148,26 @@ void arch_cpu_wait_for_action(void);
  */
 unsigned int smp_processor_id(void);
 
+/*
+ * Stages and rmodules have 2 entry points: BSP and non-BSP. Provided
+ * a pointer the correct non-BSP entry point will be returned. The
+ * first instruction is for BSP and the 2nd is for non-BSP. Instructions
+ * are all 32-bit on arm64.
+ */
+static inline void *secondary_entry_point(void *e)
+{
+	uintptr_t nonbsp = (uintptr_t)e;
+
+	return (void *)(nonbsp + sizeof(uint32_t));
+}
+
+/*
+ * The arm64_cpu_startup() initializes a CPU's exception stack and regular
+ * stack as well initializing the C environment for the processor. It
+ * calls into the array of function pointers at symbol c_entry depending
+ * on BSP state. Note that arm64_cpu_startup contains secondary entry
+ * point which can be obtained by secondary_entry_point().
+ */
+void arm64_cpu_startup(void);
+
 #endif /* __ARCH_CPU_H__ */