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-rw-r--r--src/arch/arm64/armv8/cache.c10
-rw-r--r--src/arch/arm64/boot.c2
-rw-r--r--src/arch/arm64/include/armv8/arch/cache.h3
3 files changed, 0 insertions, 15 deletions
diff --git a/src/arch/arm64/armv8/cache.c b/src/arch/arm64/armv8/cache.c
index 53aefe0bc4..59d56b2902 100644
--- a/src/arch/arm64/armv8/cache.c
+++ b/src/arch/arm64/armv8/cache.c
@@ -118,16 +118,6 @@ void dcache_invalidate_by_mva(void const *addr, size_t len)
dcache_op_va(addr, len, OP_DCIVAC);
}
-void cache_sync_instructions(void)
-{
- uint32_t sctlr = raw_read_sctlr_current();
- if (sctlr & SCTLR_C)
- dcache_clean_all(); /* includes trailing DSB (assembly) */
- else if (sctlr & SCTLR_I)
- dcache_clean_invalidate_all();
- icache_invalidate_all(); /* includdes leading DSB and trailing ISB. */
-}
-
/*
* For each segment of a program loaded this function is called
* to invalidate caches for the addresses of the loaded segment
diff --git a/src/arch/arm64/boot.c b/src/arch/arm64/boot.c
index 3804515392..5fd46a7ebd 100644
--- a/src/arch/arm64/boot.c
+++ b/src/arch/arm64/boot.c
@@ -39,8 +39,6 @@ static void run_payload(struct prog *prog)
else {
uint8_t current_el = get_current_el();
- cache_sync_instructions();
-
printk(BIOS_SPEW, "entry = %p\n", doit);
/* If current EL is not EL3, jump to payload at same EL. */
diff --git a/src/arch/arm64/include/armv8/arch/cache.h b/src/arch/arm64/include/armv8/arch/cache.h
index 8e133efcff..7bf81cf258 100644
--- a/src/arch/arm64/include/armv8/arch/cache.h
+++ b/src/arch/arm64/include/armv8/arch/cache.h
@@ -76,9 +76,6 @@ void dcache_clean_invalidate_all(void);
/* returns number of bytes per cache line */
unsigned int dcache_line_bytes(void);
-/* perform all icache/dcache maintenance needed after loading new code */
-void cache_sync_instructions(void);
-
/* tlb invalidate all */
void tlb_invalidate_all(void);