diff options
Diffstat (limited to 'src/arch/i386/Makefile.inc')
| -rw-r--r-- | src/arch/i386/Makefile.inc | 46 |
1 files changed, 23 insertions, 23 deletions
diff --git a/src/arch/i386/Makefile.inc b/src/arch/i386/Makefile.inc index 4fb4ee5e21..24a1654212 100644 --- a/src/arch/i386/Makefile.inc +++ b/src/arch/i386/Makefile.inc @@ -14,24 +14,24 @@ BOOTBLOCK_SIZE=65536 # Build the final rom image $(obj)/coreboot.rom: $(obj)/coreboot.bootblock $(obj)/coreboot_ram $(CBFSTOOL) - $(Q)rm -f $@ - $(Q)$(CBFSTOOL) $@ create $(shell expr 1024 \* $(CONFIG_COREBOOT_ROMSIZE_KB)) $(BOOTBLOCK_SIZE) $(obj)/coreboot.bootblock - $(Q)if [ -f fallback/coreboot_apc ]; \ + rm -f $@ + $(CBFSTOOL) $@ create $(shell expr 1024 \* $(CONFIG_COREBOOT_ROMSIZE_KB)) $(BOOTBLOCK_SIZE) $(obj)/coreboot.bootblock + if [ -f fallback/coreboot_apc ]; \ then \ - $(Q)$(CBFSTOOL) $@ add-stage fallback/coreboot_apc fallback/coreboot_apc $(CBFS_COMPRESS_FLAG); \ + $(CBFSTOOL) $@ add-stage fallback/coreboot_apc fallback/coreboot_apc $(CBFS_COMPRESS_FLAG); \ fi - $(Q)$(CBFSTOOL) $@ add-stage $(obj)/coreboot_ram fallback/coreboot_ram $(CBFS_COMPRESS_FLAG) + $(CBFSTOOL) $@ add-stage $(obj)/coreboot_ram fallback/coreboot_ram $(CBFS_COMPRESS_FLAG) ifeq ($(CONFIG_PAYLOAD_NONE),y) @printf " PAYLOAD none (as specified by user)\n" else @printf " PAYLOAD $(CONFIG_FALLBACK_PAYLOAD_FILE) $(COMPRESSFLAG)\n" - $(Q)$(CBFSTOOL) ./build/coreboot.rom add-payload $(CONFIG_FALLBACK_PAYLOAD_FILE) fallback/payload $(CBFS_COMPRESS_FLAG) + $(CBFSTOOL) ./build/coreboot.rom add-payload $(CONFIG_FALLBACK_PAYLOAD_FILE) fallback/payload $(CBFS_COMPRESS_FLAG) ifeq ($(CONFIG_VGA_BIOS),y) @printf " VGABIOS $(CONFIG_FALLBACK_VGA_BIOS_FILE) $(CONFIG_FALLBACK_VGA_BIOS_ID)\n" - $(Q)$(CBFSTOOL) ./build/coreboot.rom add $(CONFIG_FALLBACK_VGA_BIOS_FILE) "pci$(CONFIG_FALLBACK_VGA_BIOS_ID).rom" optionrom + $(CBFSTOOL) ./build/coreboot.rom add $(CONFIG_FALLBACK_VGA_BIOS_FILE) "pci$(CONFIG_FALLBACK_VGA_BIOS_ID).rom" optionrom endif @printf " CBFSPRINT ./build/coreboot.rom\n\n" - $(Q)$(CBFSTOOL) build/coreboot.rom print + $(CBFSTOOL) build/coreboot.rom print endif @@ -40,53 +40,53 @@ endif $(obj)/coreboot.bootblock: $(obj)/coreboot @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" - $(Q)$(OBJCOPY) -O binary $< $@ + $(OBJCOPY) -O binary $< $@ $(obj)/ldscript.ld: $(ldscripts) $(obj)/ldoptions - $(Q)printf 'INCLUDE "ldoptions"\n' > $@ - $(Q)printf '$(foreach ldscript,$(ldscripts),INCLUDE "$(ldscript)"\n)' >> $@ + printf 'INCLUDE "ldoptions"\n' > $@ + printf '$(foreach ldscript,$(ldscripts),INCLUDE "$(ldscript)"\n)' >> $@ $(obj)/crt0_includes.h: $(crt0s) - $(Q)printf '$(foreach crt0,$(obj)/config.h $(crt0s),#include "$(crt0)"\n)' > $@ + printf '$(foreach crt0,$(obj)/config.h $(crt0s),#include "$(crt0)"\n)' > $@ $(obj)/mainboard/$(MAINBOARDDIR)/crt0.o: $(obj)/mainboard/$(MAINBOARDDIR)/crt0.s - $(Q)$(CC) -I$(obj) -Wa,-acdlns -c -o $@ $< > $(dir $@)/crt0.disasm + $(CC) -I$(obj) -Wa,-acdlns -c -o $@ $< > $(dir $@)/crt0.disasm $(obj)/mainboard/$(MAINBOARDDIR)/crt0.s: $(src)/arch/i386/init/crt0.S.lb $(obj)/crt0_includes.h - $(Q)$(CC) -x assembler-with-cpp -DASSEMBLY -E -I$(src)/include -I$(src)/arch/i386/include -I$(obj) -include $(obj)/config.h -I. -I$(src) $< > $@.new && mv $@.new $@ + $(CC) -x assembler-with-cpp -DASSEMBLY -E -I$(src)/include -I$(src)/arch/i386/include -I$(obj) -include $(obj)/config.h -I. -I$(src) $< > $@.new && mv $@.new $@ $(obj)/coreboot: $(initobjs) $(obj)/ldscript.ld @printf " LINK $(subst $(obj)/,,$(@))\n" - $(Q)$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(obj)/ldscript.ld $(initobjs) - $(Q)$(NM) -n $(obj)/coreboot | sort > $(obj)/coreboot.map + $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(obj)/ldscript.ld $(initobjs) + $(NM) -n $(obj)/coreboot | sort > $(obj)/coreboot.map ####################################################################### # i386 specific tools $(obj)/option_table.h $(obj)/option_table.c: $(obj)/build_opt_tbl $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout @printf " OPTION $(subst $(obj)/,,$(@))\n" - $(Q)$(obj)/build_opt_tbl --config $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout --header $(obj)/option_table.h --option $(obj)/option_table.c + $(obj)/build_opt_tbl --config $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout --header $(obj)/option_table.h --option $(obj)/option_table.c $(obj)/build_opt_tbl: $(top)/util/options/build_opt_tbl.c $(top)/src/include/pc80/mc146818rtc.h $(top)/src/include/boot/coreboot_tables.h @printf " HOSTCC $(subst $(obj)/,,$(@))\n" - $(Q)$(HOSTCC) $(HOSTCFLAGS) -include $(obj)/config.h $< -o $@ + $(HOSTCC) $(HOSTCFLAGS) -include $(obj)/config.h $< -o $@ ####################################################################### # Build the coreboot_ram (stage 2) $(obj)/coreboot_ram: $(obj)/coreboot_ram.o $(src)/config/coreboot_ram.ld #ldoptions @printf " CC $(subst $(obj)/,,$(@))\n" - $(Q)$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/config/coreboot_ram.ld $(obj)/coreboot_ram.o - $(Q)$(NM) -n $(obj)/coreboot_ram | sort > $(obj)/coreboot_ram.map + $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/config/coreboot_ram.ld $(obj)/coreboot_ram.o + $(NM) -n $(obj)/coreboot_ram | sort > $(obj)/coreboot_ram.map $(obj)/coreboot_ram.o: $(obj)/arch/i386/lib/c_start.o $(drivers) $(obj)/coreboot.a $(LIBGCC_FILE_NAME) @printf " CC $(subst $(obj)/,,$(@))\n" - $(Q)$(CC) -nostdlib -r -o $@ $(obj)/arch/i386/lib/c_start.o $(drivers) -Wl,-\( $(obj)/coreboot.a $(LIBGCC_FILE_NAME) -Wl,-\) + $(CC) -nostdlib -r -o $@ $(obj)/arch/i386/lib/c_start.o $(drivers) -Wl,-\( $(obj)/coreboot.a $(LIBGCC_FILE_NAME) -Wl,-\) $(obj)/coreboot.a: $(objs) @printf " AR $(subst $(obj)/,,$(@))\n" - $(Q)rm -f $(obj)/coreboot.a - $(Q)$(AR) cr $(obj)/coreboot.a $(objs) + rm -f $(obj)/coreboot.a + $(AR) cr $(obj)/coreboot.a $(objs) ####################################################################### # done |