summaryrefslogtreecommitdiff
path: root/src/arch/i386/init
diff options
context:
space:
mode:
Diffstat (limited to 'src/arch/i386/init')
-rw-r--r--src/arch/i386/init/crt0.S.lb8
-rw-r--r--src/arch/i386/init/ldscript.lb6
-rw-r--r--src/arch/i386/init/ldscript_apc.lb4
-rw-r--r--src/arch/i386/init/ldscript_failover.lb2
-rw-r--r--src/arch/i386/init/ldscript_fallback.lb6
5 files changed, 13 insertions, 13 deletions
diff --git a/src/arch/i386/init/crt0.S.lb b/src/arch/i386/init/crt0.S.lb
index 952b8110cf..6a6c07be0e 100644
--- a/src/arch/i386/init/crt0.S.lb
+++ b/src/arch/i386/init/crt0.S.lb
@@ -16,7 +16,7 @@
*
* - Converted to gas assembly, and refitted to work with etherboot.
* Eric Biederman 20 Aug 2002
- * - Merged the nrv2b decompressor into crt0.base of LinuxBIOS
+ * - Merged the nrv2b decompressor into crt0.base of coreboot
* Eric Biederman 26 Sept 2002
*/
@@ -65,7 +65,7 @@ __main:
cld /* clear direction flag */
- /* copy linuxBIOS from it's initial load location to
+ /* copy coreboot from it's initial load location to
* the location it is compiled to run at.
* Normally this is copying from FLASH ROM to RAM.
*/
@@ -215,8 +215,8 @@ crt_console_tx_string:
#if defined(CONSOLE_DEBUG_TX_STRING) && (ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG)
.section ".rom.data"
-str_copying_to_ram: .string "Copying LinuxBIOS to RAM.\r\n"
-str_pre_main: .string "Jumping to LinuxBIOS.\r\n"
+str_copying_to_ram: .string "Copying coreboot to RAM.\r\n"
+str_pre_main: .string "Jumping to coreboot.\r\n"
.previous
#endif /* ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG */
diff --git a/src/arch/i386/init/ldscript.lb b/src/arch/i386/init/ldscript.lb
index c902782681..578d121c84 100644
--- a/src/arch/i386/init/ldscript.lb
+++ b/src/arch/i386/init/ldscript.lb
@@ -7,7 +7,7 @@
* : heap
* : stack
* _ROMBASE
- * : linuxbios text
+ * : coreboot text
* : readonly text
*/
/*
@@ -32,14 +32,14 @@ ENTRY(_start)
*/
TARGET(binary)
-INPUT(linuxbios_ram.rom)
+INPUT(coreboot_ram.rom)
SECTIONS
{
. = _ROMBASE;
.ram . : {
_ram = . ;
- linuxbios_ram.rom(*)
+ coreboot_ram.rom(*)
_eram = . ;
}
diff --git a/src/arch/i386/init/ldscript_apc.lb b/src/arch/i386/init/ldscript_apc.lb
index 43570ebe90..ce491547b0 100644
--- a/src/arch/i386/init/ldscript_apc.lb
+++ b/src/arch/i386/init/ldscript_apc.lb
@@ -1,9 +1,9 @@
-INPUT(linuxbios_apc.rom)
+INPUT(coreboot_apc.rom)
SECTIONS
{
.apcrom . : {
_apcrom = .;
- linuxbios_apc.rom(*)
+ coreboot_apc.rom(*)
_eapcrom = .;
}
_iseg_apc = DCACHE_RAM_BASE;
diff --git a/src/arch/i386/init/ldscript_failover.lb b/src/arch/i386/init/ldscript_failover.lb
index 12cb3feba8..207955b31a 100644
--- a/src/arch/i386/init/ldscript_failover.lb
+++ b/src/arch/i386/init/ldscript_failover.lb
@@ -7,7 +7,7 @@
* : heap
* : stack
* _ROMBASE
- * : linuxbios text
+ * : coreboot text
* : readonly text
*/
/*
diff --git a/src/arch/i386/init/ldscript_fallback.lb b/src/arch/i386/init/ldscript_fallback.lb
index f2ffd1288c..be86fc2952 100644
--- a/src/arch/i386/init/ldscript_fallback.lb
+++ b/src/arch/i386/init/ldscript_fallback.lb
@@ -7,7 +7,7 @@
* : heap
* : stack
* _ROMBASE
- * : linuxbios text
+ * : coreboot text
* : readonly text
*/
/*
@@ -32,14 +32,14 @@ ENTRY(_start)
*/
TARGET(binary)
-INPUT(linuxbios_ram.rom)
+INPUT(coreboot_ram.rom)
SECTIONS
{
. = _ROMBASE;
.ram . : {
_ram = . ;
- linuxbios_ram.rom(*)
+ coreboot_ram.rom(*)
_eram = . ;
}