diff options
Diffstat (limited to 'src/arch/x86/cbmem.c')
| -rw-r--r-- | src/arch/x86/cbmem.c | 44 |
1 files changed, 6 insertions, 38 deletions
diff --git a/src/arch/x86/cbmem.c b/src/arch/x86/cbmem.c index b3d89f4953..73967e17f8 100644 --- a/src/arch/x86/cbmem.c +++ b/src/arch/x86/cbmem.c @@ -15,55 +15,23 @@ #include <cbmem.h> #include <arch/acpi.h> -#if IS_ENABLED(CONFIG_LATE_CBMEM_INIT) - -void __weak backup_top_of_low_cacheable(uintptr_t ramtop) -{ - /* Do nothing. Chipset may have implementation to save ramtop in NVRAM. - */ -} - -uintptr_t __weak restore_top_of_low_cacheable(void) -{ - return 0; -} - -#endif /* LATE_CBMEM_INIT */ - #if IS_ENABLED(CONFIG_CBMEM_TOP_BACKUP) -static void *cbmem_top_backup; - -void set_late_cbmem_top(uintptr_t ramtop) -{ - backup_top_of_low_cacheable(ramtop); - if (ENV_RAMSTAGE) - cbmem_top_backup = (void *)ramtop; -} - -/* Top of CBMEM is at highest usable DRAM address below 4GiB. */ -uintptr_t __weak restore_cbmem_top(void) -{ - if (IS_ENABLED(CONFIG_LATE_CBMEM_INIT) && ENV_ROMSTAGE) - if (!acpi_is_wakeup_s3()) - return 0; - - return restore_top_of_low_cacheable(); -} - void *cbmem_top(void) { - uintptr_t top_backup; + static void *cbmem_top_backup; + void *top_backup; if (ENV_RAMSTAGE && cbmem_top_backup != NULL) return cbmem_top_backup; - top_backup = restore_cbmem_top(); + /* Top of CBMEM is at highest usable DRAM address below 4GiB. */ + top_backup = (void *)restore_top_of_low_cacheable(); if (ENV_RAMSTAGE) - cbmem_top_backup = (void *)top_backup; + cbmem_top_backup = top_backup; - return (void *)top_backup; + return top_backup; } #endif /* CBMEM_TOP_BACKUP */ |