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-rw-r--r--src/arch/x86/include/arch/cache.h20
1 files changed, 20 insertions, 0 deletions
diff --git a/src/arch/x86/include/arch/cache.h b/src/arch/x86/include/arch/cache.h
index 687d3bf9d3..9f7cda2643 100644
--- a/src/arch/x86/include/arch/cache.h
+++ b/src/arch/x86/include/arch/cache.h
@@ -31,6 +31,9 @@
#ifndef ARCH_CACHE_H
#define ARCH_CACHE_H
+#include <arch/early_variables.h>
+#include <cpu/x86/cache.h>
+
/*
* For the purposes of the currently executing CPU loading code that will be
* run there aren't any cache coherency operations required. This just provides
@@ -38,4 +41,21 @@
*/
static inline void cache_sync_instructions(void) {}
+/* Executing WBINVD when running out of CAR would not be good, prevent that. */
+static inline void dcache_clean_invalidate_all(void)
+{
+ if (!car_active())
+ wbinvd();
+}
+static inline void dcache_clean_all(void)
+{
+ /* x86 doesn't have a "clean without invalidate", fall back to both. */
+ dcache_clean_invalidate_all();
+}
+static inline void dcache_invalidate_all(void)
+{
+ if (!car_active())
+ invd();
+}
+
#endif /* ARCH_CACHE_H */