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-rw-r--r--src/arch/x86/Kconfig9
-rw-r--r--src/arch/x86/bootblock_crt0.S22
2 files changed, 28 insertions, 3 deletions
diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig
index 1fea99ac3b..b6073c36ff 100644
--- a/src/arch/x86/Kconfig
+++ b/src/arch/x86/Kconfig
@@ -133,6 +133,15 @@ config BOOTBLOCK_NORTHBRIDGE_INIT
config BOOTBLOCK_RESETS
string
+config BOOTBLOCK_SAVE_BIST_AND_TIMESTAMP
+ bool
+ default n
+ help
+ Select this value to provide a routine to save the BIST and timestamp
+ values. The default code places the BIST value in MM0 and the
+ timestamp value in MM2:MM1. Another file is necessary when the CPU
+ does not support the MMx register set.
+
config HAVE_CMOS_DEFAULT
def_bool n
diff --git a/src/arch/x86/bootblock_crt0.S b/src/arch/x86/bootblock_crt0.S
index 8ae82b4368..1b160f483b 100644
--- a/src/arch/x86/bootblock_crt0.S
+++ b/src/arch/x86/bootblock_crt0.S
@@ -43,12 +43,28 @@ debug_spinloop:
#endif
bootblock_protected_mode_entry:
- /* Save BIST result */
- movd %eax, %mm0
- /* Save an early timestamp */
+
+ /* BIST result in eax */
+ movl %eax, %ebx
+
+ /* Get an early timestamp */
rdtsc
+
+#if IS_ENABLED(CONFIG_BOOTBLOCK_SAVE_BIST_AND_TIMESTAMP)
+ lea 1f, %ebp
+
+ /* eax: Low 32-bits of timestamp
+ * ebx: BIST result
+ * ebp: return address
+ * edx: High 32-bits of timestamp
+ */
+ jmp bootblock_save_bist_and_timestamp
+1:
+#else
+ movd %ebx, %mm0
movd %eax, %mm1
movd %edx, %mm2
+#endif
#if IS_ENABLED(CONFIG_SSE)
enable_sse: