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-rw-r--r--src/arch/x86/init/crt0_romcc_epilogue.inc5
-rw-r--r--src/arch/x86/init/prologue.inc2
-rw-r--r--src/arch/x86/lib/c_start.S6
3 files changed, 7 insertions, 6 deletions
diff --git a/src/arch/x86/init/crt0_romcc_epilogue.inc b/src/arch/x86/init/crt0_romcc_epilogue.inc
index 3bd1b36992..b19f9687e9 100644
--- a/src/arch/x86/init/crt0_romcc_epilogue.inc
+++ b/src/arch/x86/init/crt0_romcc_epilogue.inc
@@ -5,11 +5,12 @@
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; version 2 of the License.
*/
+#include <cpu/x86/post_code.h>
/* clear boot_complete flag */
xorl %ebp, %ebp
__main:
- post_code(0x11)
+ post_code(POST_PREPARE_RAMSTAGE)
cld /* clear direction flag */
movl %ebp, %esi
@@ -20,7 +21,7 @@ __main:
call copy_and_run
.Lhlt:
- post_code(0xee)
+ post_code(POST_DEAD_CODE)
hlt
jmp .Lhlt
diff --git a/src/arch/x86/init/prologue.inc b/src/arch/x86/init/prologue.inc
index 8947f20de3..b85c5c0faa 100644
--- a/src/arch/x86/init/prologue.inc
+++ b/src/arch/x86/init/prologue.inc
@@ -25,5 +25,5 @@
/* This is the entry code. The code in the .reset section jumps here. */
- post_code(0x01)
+ post_code(POST_RESET_VECTOR_CORRECT)
diff --git a/src/arch/x86/lib/c_start.S b/src/arch/x86/lib/c_start.S
index 94ce4a70c3..005ac33ee9 100644
--- a/src/arch/x86/lib/c_start.S
+++ b/src/arch/x86/lib/c_start.S
@@ -14,7 +14,7 @@ _start:
movl %eax, %fs
movl %eax, %gs
- post_code(0x13) /* post 13 */
+ post_code(POST_ENTRY_C_START) /* post 13 */
/** clear stack */
cld
@@ -73,7 +73,7 @@ _start:
* bss is cleared. Now we call the main routine and
* let it do the rest.
*/
- post_code(0xfe) /* post fe */
+ post_code(POST_PRE_HARDWAREMAIN) /* post fe */
/* Restore the stack location */
movl %ebp, %esp
@@ -82,7 +82,7 @@ _start:
call hardwaremain
/* NOTREACHED */
.Lhlt:
- post_code(0xee) /* post ee */
+ post_code(POST_DEAD_CODE) /* post ee */
hlt
jmp .Lhlt