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-rw-r--r--src/arch/armv7/coreboot_ram.ld7
1 files changed, 1 insertions, 6 deletions
diff --git a/src/arch/armv7/coreboot_ram.ld b/src/arch/armv7/coreboot_ram.ld
index c69499c362..0644e3669d 100644
--- a/src/arch/armv7/coreboot_ram.ld
+++ b/src/arch/armv7/coreboot_ram.ld
@@ -26,7 +26,7 @@ ENTRY(_start)
SECTIONS
{
- . = CONFIG_RAMBASE;
+ . = CONFIG_SYS_SDRAM_BASE;
/* First we place the code and read only data (typically const declared).
* This could theoretically be placed in rom.
*/
@@ -123,11 +123,6 @@ SECTIONS
_ram_seg = _text;
_eram_seg = _eheap;
- /* CONFIG_RAMTOP is the upper address of cached memory (among other
- * things). We must not exceed beyond that address, there be dragons.
- */
- _bogus = ASSERT( ( _eram_seg < (CONFIG_RAMTOP)) , "Please increase CONFIG_RAMTOP");
-
/* Discard the sections we don't need/want */
/DISCARD/ : {