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-rw-r--r--src/arch/x86/include/arch/io.h183
-rw-r--r--src/arch/x86/include/arch/pci_io_cfg.h111
-rw-r--r--src/arch/x86/include/arch/pci_mmio_cfg.h26
3 files changed, 134 insertions, 186 deletions
diff --git a/src/arch/x86/include/arch/io.h b/src/arch/x86/include/arch/io.h
index 49499b97d1..b258dd0163 100644
--- a/src/arch/x86/include/arch/io.h
+++ b/src/arch/x86/include/arch/io.h
@@ -213,188 +213,7 @@ typedef unsigned device_t; /* pci and pci_mmio need to have different ways to ha
* Before that We need to use %gs, and leave %fs to other RAM access
*/
-static inline __attribute__((always_inline)) uint8_t pci_io_read_config8(device_t dev, unsigned where)
-{
- unsigned addr;
-#if !CONFIG_PCI_IO_CFG_EXT
- addr = (dev>>4) | where;
-#else
- addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16); //seg == 0
-#endif
- outl(0x80000000 | (addr & ~3), 0xCF8);
- return inb(0xCFC + (addr & 3));
-}
-
-#if CONFIG_MMCONF_SUPPORT
-static inline __attribute__((always_inline)) uint8_t pci_mmio_read_config8(device_t dev, unsigned where)
-{
- unsigned addr;
- addr = CONFIG_MMCONF_BASE_ADDRESS | dev | where;
- return read8(addr);
-}
-#endif
-static inline __attribute__((always_inline)) uint8_t pci_read_config8(device_t dev, unsigned where)
-{
-#if CONFIG_MMCONF_SUPPORT_DEFAULT
- return pci_mmio_read_config8(dev, where);
-#else
- return pci_io_read_config8(dev, where);
-#endif
-}
-
-static inline __attribute__((always_inline)) uint16_t pci_io_read_config16(device_t dev, unsigned where)
-{
- unsigned addr;
-#if !CONFIG_PCI_IO_CFG_EXT
- addr = (dev>>4) | where;
-#else
- addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16);
-#endif
- outl(0x80000000 | (addr & ~3), 0xCF8);
- return inw(0xCFC + (addr & 2));
-}
-
-#if CONFIG_MMCONF_SUPPORT
-static inline __attribute__((always_inline)) uint16_t pci_mmio_read_config16(device_t dev, unsigned where)
-{
- unsigned addr;
- addr = CONFIG_MMCONF_BASE_ADDRESS | dev | (where & ~1);
- return read16(addr);
-}
-#endif
-
-static inline __attribute__((always_inline)) uint16_t pci_read_config16(device_t dev, unsigned where)
-{
-#if CONFIG_MMCONF_SUPPORT_DEFAULT
- return pci_mmio_read_config16(dev, where);
-#else
- return pci_io_read_config16(dev, where);
-#endif
-}
-
-
-static inline __attribute__((always_inline)) uint32_t pci_io_read_config32(device_t dev, unsigned where)
-{
- unsigned addr;
-#if !CONFIG_PCI_IO_CFG_EXT
- addr = (dev>>4) | where;
-#else
- addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16);
-#endif
- outl(0x80000000 | (addr & ~3), 0xCF8);
- return inl(0xCFC);
-}
-
-#if CONFIG_MMCONF_SUPPORT
-static inline __attribute__((always_inline)) uint32_t pci_mmio_read_config32(device_t dev, unsigned where)
-{
- unsigned addr;
- addr = CONFIG_MMCONF_BASE_ADDRESS | dev | (where & ~3);
- return read32(addr);
-}
-#endif
-
-static inline __attribute__((always_inline)) uint32_t pci_read_config32(device_t dev, unsigned where)
-{
-#if CONFIG_MMCONF_SUPPORT_DEFAULT
- return pci_mmio_read_config32(dev, where);
-#else
- return pci_io_read_config32(dev, where);
-#endif
-}
-
-static inline __attribute__((always_inline)) void pci_io_write_config8(device_t dev, unsigned where, uint8_t value)
-{
- unsigned addr;
-#if !CONFIG_PCI_IO_CFG_EXT
- addr = (dev>>4) | where;
-#else
- addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16);
-#endif
- outl(0x80000000 | (addr & ~3), 0xCF8);
- outb(value, 0xCFC + (addr & 3));
-}
-
-#if CONFIG_MMCONF_SUPPORT
-static inline __attribute__((always_inline)) void pci_mmio_write_config8(device_t dev, unsigned where, uint8_t value)
-{
- unsigned addr;
- addr = CONFIG_MMCONF_BASE_ADDRESS | dev | where;
- write8(addr, value);
-}
-#endif
-
-static inline __attribute__((always_inline)) void pci_write_config8(device_t dev, unsigned where, uint8_t value)
-{
-#if CONFIG_MMCONF_SUPPORT_DEFAULT
- pci_mmio_write_config8(dev, where, value);
-#else
- pci_io_write_config8(dev, where, value);
-#endif
-}
-
-
-static inline __attribute__((always_inline)) void pci_io_write_config16(device_t dev, unsigned where, uint16_t value)
-{
- unsigned addr;
-#if !CONFIG_PCI_IO_CFG_EXT
- addr = (dev>>4) | where;
-#else
- addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16);
-#endif
- outl(0x80000000 | (addr & ~3), 0xCF8);
- outw(value, 0xCFC + (addr & 2));
-}
-
-#if CONFIG_MMCONF_SUPPORT
-static inline __attribute__((always_inline)) void pci_mmio_write_config16(device_t dev, unsigned where, uint16_t value)
-{
- unsigned addr;
- addr = CONFIG_MMCONF_BASE_ADDRESS | dev | (where & ~1);
- write16(addr, value);
-}
-#endif
-
-static inline __attribute__((always_inline)) void pci_write_config16(device_t dev, unsigned where, uint16_t value)
-{
-#if CONFIG_MMCONF_SUPPORT_DEFAULT
- pci_mmio_write_config16(dev, where, value);
-#else
- pci_io_write_config16(dev, where, value);
-#endif
-}
-
-
-static inline __attribute__((always_inline)) void pci_io_write_config32(device_t dev, unsigned where, uint32_t value)
-{
- unsigned addr;
-#if !CONFIG_PCI_IO_CFG_EXT
- addr = (dev>>4) | where;
-#else
- addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16);
-#endif
- outl(0x80000000 | (addr & ~3), 0xCF8);
- outl(value, 0xCFC);
-}
-
-#if CONFIG_MMCONF_SUPPORT
-static inline __attribute__((always_inline)) void pci_mmio_write_config32(device_t dev, unsigned where, uint32_t value)
-{
- unsigned addr;
- addr = CONFIG_MMCONF_BASE_ADDRESS | dev | (where & ~3);
- write32(addr, value);
-}
-#endif
-
-static inline __attribute__((always_inline)) void pci_write_config32(device_t dev, unsigned where, uint32_t value)
-{
-#if CONFIG_MMCONF_SUPPORT_DEFAULT
- pci_mmio_write_config32(dev, where, value);
-#else
- pci_io_write_config32(dev, where, value);
-#endif
-}
-
+#include <arch/pci_io_cfg.h>
#include <arch/pci_mmio_cfg.h>
static inline __attribute__((always_inline)) void pci_or_config8(device_t dev, unsigned where, uint8_t value)
diff --git a/src/arch/x86/include/arch/pci_io_cfg.h b/src/arch/x86/include/arch/pci_io_cfg.h
new file mode 100644
index 0000000000..fbe83a2b47
--- /dev/null
+++ b/src/arch/x86/include/arch/pci_io_cfg.h
@@ -0,0 +1,111 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef _PCI_IO_CFG_H
+#define _PCI_IO_CFG_H
+
+#include <arch/io.h>
+
+static inline __attribute__((always_inline))
+uint8_t pci_io_read_config8(device_t dev, unsigned where)
+{
+ unsigned addr;
+#if !CONFIG_PCI_IO_CFG_EXT
+ addr = (dev>>4) | where;
+#else
+ addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16); //seg == 0
+#endif
+ outl(0x80000000 | (addr & ~3), 0xCF8);
+ return inb(0xCFC + (addr & 3));
+}
+
+static inline __attribute__((always_inline))
+uint16_t pci_io_read_config16(device_t dev, unsigned where)
+{
+ unsigned addr;
+#if !CONFIG_PCI_IO_CFG_EXT
+ addr = (dev>>4) | where;
+#else
+ addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16);
+#endif
+ outl(0x80000000 | (addr & ~3), 0xCF8);
+ return inw(0xCFC + (addr & 2));
+}
+
+static inline __attribute__((always_inline))
+uint32_t pci_io_read_config32(device_t dev, unsigned where)
+{
+ unsigned addr;
+#if !CONFIG_PCI_IO_CFG_EXT
+ addr = (dev>>4) | where;
+#else
+ addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16);
+#endif
+ outl(0x80000000 | (addr & ~3), 0xCF8);
+ return inl(0xCFC);
+}
+
+static inline __attribute__((always_inline))
+void pci_io_write_config8(device_t dev, unsigned where, uint8_t value)
+{
+ unsigned addr;
+#if !CONFIG_PCI_IO_CFG_EXT
+ addr = (dev>>4) | where;
+#else
+ addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16);
+#endif
+ outl(0x80000000 | (addr & ~3), 0xCF8);
+ outb(value, 0xCFC + (addr & 3));
+}
+
+static inline __attribute__((always_inline))
+void pci_io_write_config16(device_t dev, unsigned where, uint16_t value)
+{
+ unsigned addr;
+#if !CONFIG_PCI_IO_CFG_EXT
+ addr = (dev>>4) | where;
+#else
+ addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16);
+#endif
+ outl(0x80000000 | (addr & ~3), 0xCF8);
+ outw(value, 0xCFC + (addr & 2));
+}
+
+static inline __attribute__((always_inline))
+void pci_io_write_config32(device_t dev, unsigned where, uint32_t value)
+{
+ unsigned addr;
+#if !CONFIG_PCI_IO_CFG_EXT
+ addr = (dev>>4) | where;
+#else
+ addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16);
+#endif
+ outl(0x80000000 | (addr & ~3), 0xCF8);
+ outl(value, 0xCFC);
+}
+
+#if !CONFIG_MMCONF_SUPPORT_DEFAULT
+#define pci_read_config8 pci_io_read_config8
+#define pci_read_config16 pci_io_read_config16
+#define pci_read_config32 pci_io_read_config32
+
+#define pci_write_config8 pci_io_write_config8
+#define pci_write_config16 pci_io_write_config16
+#define pci_write_config32 pci_io_write_config32
+#endif
+
+#endif /* _PCI_IO_CFG_H */
diff --git a/src/arch/x86/include/arch/pci_mmio_cfg.h b/src/arch/x86/include/arch/pci_mmio_cfg.h
index dd00d376cb..545be236c2 100644
--- a/src/arch/x86/include/arch/pci_mmio_cfg.h
+++ b/src/arch/x86/include/arch/pci_mmio_cfg.h
@@ -37,7 +37,7 @@ static inline __attribute__ ((always_inline))
u16 pcie_read_config16(device_t dev, unsigned int where)
{
unsigned long addr;
- addr = DEFAULT_PCIEXBAR | dev | where;
+ addr = DEFAULT_PCIEXBAR | dev | (where & ~1);
return read16(addr);
}
@@ -45,7 +45,7 @@ static inline __attribute__ ((always_inline))
u32 pcie_read_config32(device_t dev, unsigned int where)
{
unsigned long addr;
- addr = DEFAULT_PCIEXBAR | dev | where;
+ addr = DEFAULT_PCIEXBAR | dev | (where & ~3);
return read32(addr);
}
@@ -61,7 +61,7 @@ static inline __attribute__ ((always_inline))
void pcie_write_config16(device_t dev, unsigned int where, u16 value)
{
unsigned long addr;
- addr = DEFAULT_PCIEXBAR | dev | where;
+ addr = DEFAULT_PCIEXBAR | dev | (where & ~1);
write16(addr, value);
}
@@ -69,7 +69,7 @@ static inline __attribute__ ((always_inline))
void pcie_write_config32(device_t dev, unsigned int where, u32 value)
{
unsigned long addr;
- addr = DEFAULT_PCIEXBAR | dev | where;
+ addr = DEFAULT_PCIEXBAR | dev | (where & ~3);
write32(addr, value);
}
@@ -94,5 +94,23 @@ void pcie_or_config32(device_t dev, unsigned int where, u32 ormask)
pcie_write_config32(dev, where, value | ormask);
}
+#define pci_mmio_read_config8 pcie_read_config8
+#define pci_mmio_read_config16 pcie_read_config16
+#define pci_mmio_read_config32 pcie_read_config32
+
+#define pci_mmio_write_config8 pcie_write_config8
+#define pci_mmio_write_config16 pcie_write_config16
+#define pci_mmio_write_config32 pcie_write_config32
+
+#if CONFIG_MMCONF_SUPPORT_DEFAULT
+#define pci_read_config8 pcie_read_config8
+#define pci_read_config16 pcie_read_config16
+#define pci_read_config32 pcie_read_config32
+
+#define pci_write_config8 pcie_write_config8
+#define pci_write_config16 pcie_write_config16
+#define pci_write_config32 pcie_write_config32
+#endif
+
#endif /* CONFIG_MMCONF_SUPPORT */
#endif /* _PCI_MMIO_CFG_H */