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Diffstat (limited to 'src/cpu/amd/agesa/family15tn/udelay.c')
-rw-r--r--src/cpu/amd/agesa/family15tn/udelay.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/cpu/amd/agesa/family15tn/udelay.c b/src/cpu/amd/agesa/family15tn/udelay.c
index 3d40fc3b33..7ff4c5c7a8 100644
--- a/src/cpu/amd/agesa/family15tn/udelay.c
+++ b/src/cpu/amd/agesa/family15tn/udelay.c
@@ -21,6 +21,7 @@
*/
#include <cpu/x86/msr.h>
+#include <cpu/amd/msr.h>
#include <cpu/x86/tsc.h>
#include <delay.h>
#include <stdint.h>
@@ -36,11 +37,11 @@ void udelay(uint32_t us)
tsc_start = rdtscll();
/* Get the P-state. This determines which MSR to read */
- msr = rdmsr(0xc0010063);
+ msr = rdmsr(PS_STS_REG);
pstate_idx = msr.lo & 0x07;
/* Get FID and VID for current P-State */
- msr = rdmsr(0xc0010064 + pstate_idx);
+ msr = rdmsr(PSTATE_0_MSR + pstate_idx);
/* Extract the FID and VID values */
fid = msr.lo & 0x3f;