diff options
Diffstat (limited to 'src/cpu/amd/car/cache_as_ram.inc')
| -rw-r--r-- | src/cpu/amd/car/cache_as_ram.inc | 22 |
1 files changed, 16 insertions, 6 deletions
diff --git a/src/cpu/amd/car/cache_as_ram.inc b/src/cpu/amd/car/cache_as_ram.inc index 0bea56dbbf..7f66f363ef 100644 --- a/src/cpu/amd/car/cache_as_ram.inc +++ b/src/cpu/amd/car/cache_as_ram.inc @@ -18,7 +18,6 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#include <cpu/x86/car.h> #include <cpu/x86/mtrr.h> #include <cpu/amd/mtrr.h> @@ -46,7 +45,8 @@ * xmm3: Backup EBX */ - save_bist_result() + /* Save the BIST result. */ + movl %eax, %ebp /* * For normal part %ebx already contain cpu_init_detected @@ -56,7 +56,10 @@ cache_as_ram_setup: post_code(0xa0) - enable_sse() + /* Enable SSE. */ + movl %cr4, %eax + orl $(3 << 9), %eax + movl %eax, %cr4 /* Figure out the CPU family. */ cvtsi2sd %ebx, %xmm3 @@ -321,7 +324,10 @@ wbcache_post_fam10_setup: post_code(0xa1) - enable_cache() + /* Enable cache. */ + movl %cr0, %eax + andl $(~((1 << 30) | (1 << 29))), %eax + movl %eax, %cr0 jmp_if_k8(fam10_end_part1) @@ -403,9 +409,13 @@ CAR_FAM10_ap_out: post_code(0xa5) - disable_sse() + /* Disable SSE. */ + movl %cr4, %eax + andl $~(3 << 9), %eax + movl %eax, %cr4 - restore_bist_result() + /* Restore the BIST result. */ + movl %ebp, %eax /* We need to set EBP? No need. */ movl %esp, %ebp |