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Diffstat (limited to 'src/cpu/amd/car/post_cache_as_ram.c')
-rw-r--r--src/cpu/amd/car/post_cache_as_ram.c34
1 files changed, 29 insertions, 5 deletions
diff --git a/src/cpu/amd/car/post_cache_as_ram.c b/src/cpu/amd/car/post_cache_as_ram.c
index 0a91326b85..813745d66e 100644
--- a/src/cpu/amd/car/post_cache_as_ram.c
+++ b/src/cpu/amd/car/post_cache_as_ram.c
@@ -18,12 +18,13 @@ static void inline __attribute__((always_inline)) memcopy(void *dest, const voi
{
__asm__ volatile(
"cld\n\t"
- "rep movsl\n\t"
+ "rep; movsl\n\t"
: /* No outputs */
: "S" (src), "D" (dest), "c" ((bytes)>>2)
);
}
+
static void post_cache_as_ram(void)
{
@@ -49,24 +50,34 @@ static void post_cache_as_ram(void)
#error "You need to set CONFIG_LB_MEM_TOPK greater than 1024"
#endif
- set_init_ram_access();
+ set_init_ram_access(); /* So we can access RAM from [1M, CONFIG_LB_MEM_TOPK) */
+// dump_mem(DCACHE_RAM_BASE+DCACHE_RAM_SIZE-0x8000, DCACHE_RAM_BASE+DCACHE_RAM_SIZE-0x7c00);
print_debug("Copying data from cache to ram -- switching to use ram as stack... ");
/* from here don't store more data in CAR */
+#if 0
__asm__ volatile (
"pushl %eax\n\t"
);
- memcopy((CONFIG_LB_MEM_TOPK<<10)-DCACHE_RAM_SIZE, DCACHE_RAM_BASE, DCACHE_RAM_SIZE); //inline
+#endif
+
+ memcopy((void *)((CONFIG_LB_MEM_TOPK<<10)-DCACHE_RAM_SIZE), (void *)DCACHE_RAM_BASE, DCACHE_RAM_SIZE); //inline
+// dump_mem((CONFIG_LB_MEM_TOPK<<10) - 0x8000, (CONFIG_LB_MEM_TOPK<<10) - 0x7c00);
+
__asm__ volatile (
/* set new esp */ /* before _RAMBASE */
"subl %0, %%ebp\n\t"
"subl %0, %%esp\n\t"
::"a"( (DCACHE_RAM_BASE + DCACHE_RAM_SIZE)- (CONFIG_LB_MEM_TOPK<<10) )
); // We need to push %eax to the stack (CAR) before copy stack and pop it later after copy stack and change esp
+#if 0
__asm__ volatile (
"popl %eax\n\t"
);
+#endif
+
+
/* We can put data to stack again */
/* only global variable sysinfo in cache need to be offset */
@@ -77,14 +88,27 @@ static void post_cache_as_ram(void)
disable_cache_as_ram_bsp();
print_debug("Clearing initial memory region: ");
- clear_init_ram(); //except the range from [(CONFIG_LB_MEM_TOPK<<10) - DCACHE_RAM_SIZE, (CONFIG_LB_MEM_TOPK<<10)), that is used as stack in ram
+ clear_init_ram(); //except the range from [(CONFIG_LB_MEM_TOPK<<10) - DCACHE_RAM_SIZE, (CONFIG_LB_MEM_TOPK<<10))
print_debug("Done\r\n");
+// dump_mem((CONFIG_LB_MEM_TOPK<<10) - 0x8000, (CONFIG_LB_MEM_TOPK<<10) - 0x7c00);
+
+#ifndef MEM_TRAIN_SEQ
+#define MEM_TRAIN_SEQ 0
+#endif
+ set_sysinfo_in_ram(1); // So other core0 could start to train mem
+
+#if MEM_TRAIN_SEQ == 1
+// struct sys_info *sysinfox = ((CONFIG_LB_MEM_TOPK<<10) - DCACHE_RAM_GLOBAL_VAR_SIZE);
+
+ // wait for ap memory to trained
+// wait_all_core0_mem_trained(sysinfox); // moved to lapic_init_cpus.c
+#endif
/*copy and execute linuxbios_ram */
copy_and_run();
/* We will not return */
- print_debug("should not be here -\r\n");
+ print_debug("should not be here -\r\n");
}