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-rw-r--r--src/cpu/amd/model_10xxx/apic_timer.c4
-rw-r--r--src/cpu/amd/model_10xxx/update_microcode.c4
2 files changed, 4 insertions, 4 deletions
diff --git a/src/cpu/amd/model_10xxx/apic_timer.c b/src/cpu/amd/model_10xxx/apic_timer.c
index d1c0538c1f..d961da795b 100644
--- a/src/cpu/amd/model_10xxx/apic_timer.c
+++ b/src/cpu/amd/model_10xxx/apic_timer.c
@@ -23,8 +23,8 @@
#include <cpu/x86/lapic.h>
/* NOTE: We use the APIC TIMER register is to hold flags for AP init during
- * pre-memory init (ROMCC). Don't use init_timer() and udelay is redirected
- * to udelay_tsc().
+ * pre-memory init (__PRE_RAM__). Don't use init_timer() and udelay is
+ * redirected to udelay_tsc().
*/
diff --git a/src/cpu/amd/model_10xxx/update_microcode.c b/src/cpu/amd/model_10xxx/update_microcode.c
index ff38c65377..a24b83d42e 100644
--- a/src/cpu/amd/model_10xxx/update_microcode.c
+++ b/src/cpu/amd/model_10xxx/update_microcode.c
@@ -18,7 +18,7 @@
*/
-#ifndef __ROMCC__
+#ifndef __PRE_RAM__
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
@@ -29,7 +29,7 @@
static const u8 microcode_updates[] __attribute__ ((aligned(16))) = {
-#ifdef __ROMCC__
+#ifdef __PRE_RAM__
/* From the Revision Guide :
* Equivalent Processor Table for AMD Family 10h Processors