diff options
Diffstat (limited to 'src/cpu/amd/pi/00660F01/model_15_init.c')
-rw-r--r-- | src/cpu/amd/pi/00660F01/model_15_init.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/cpu/amd/pi/00660F01/model_15_init.c b/src/cpu/amd/pi/00660F01/model_15_init.c index 424a6c06ff..3f3a1fda44 100644 --- a/src/cpu/amd/pi/00660F01/model_15_init.c +++ b/src/cpu/amd/pi/00660F01/model_15_init.c @@ -15,6 +15,8 @@ #include <console/console.h> #include <cpu/x86/msr.h> +#include <cpu/amd/msr.h> +#include <cpu/x86/mtrr.h> #include <cpu/amd/mtrr.h> #include <device/device.h> #include <device/pci.h> @@ -24,8 +26,6 @@ #include <cpu/x86/lapic.h> #include <cpu/cpu.h> #include <cpu/x86/cache.h> -#include <cpu/x86/mtrr.h> -#include <cpu/amd/amdfam15.h> #include <arch/acpi.h> #include <amdlib.h> @@ -82,12 +82,12 @@ static void model_15_init(struct device *dev) x86_enable_cache(); /* zero the machine check error status registers */ - msr = rdmsr(MCG_CAP); + msr = rdmsr(IA32_MCG_CAP); num_banks = msr.lo & MCA_BANKS_MASK; msr.lo = 0; msr.hi = 0; for (i = 0; i < num_banks; i++) - wrmsr(MC0_STATUS + (i * 4), msr); + wrmsr(IA32_MC0_STATUS + (i * 4), msr); /* Enable the local CPU APICs */ setup_lapic(); |