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Diffstat (limited to 'src/cpu/amd/pi/00660F01')
-rw-r--r--src/cpu/amd/pi/00660F01/Kconfig1
-rw-r--r--src/cpu/amd/pi/00660F01/fixme.c7
2 files changed, 0 insertions, 8 deletions
diff --git a/src/cpu/amd/pi/00660F01/Kconfig b/src/cpu/amd/pi/00660F01/Kconfig
index a556eccebb..b38ea6ce76 100644
--- a/src/cpu/amd/pi/00660F01/Kconfig
+++ b/src/cpu/amd/pi/00660F01/Kconfig
@@ -15,7 +15,6 @@
config CPU_AMD_PI_00660F01
bool
- select PCI_IO_CFG_EXT
select MMCONF_SUPPORT_DEFAULT
select X86_AMD_FIXED_MTRRS
diff --git a/src/cpu/amd/pi/00660F01/fixme.c b/src/cpu/amd/pi/00660F01/fixme.c
index 9a38bd81ac..6770287bca 100644
--- a/src/cpu/amd/pi/00660F01/fixme.c
+++ b/src/cpu/amd/pi/00660F01/fixme.c
@@ -74,13 +74,6 @@ void amd_initmmio(void)
MsrReg = CONFIG_MMCONF_BASE_ADDRESS | (LibAmdBitScanReverse (CONFIG_MMCONF_BUS_NUMBER) << 2) | 1;
LibAmdMsrWrite (0xC0010058, &MsrReg, &StdHeader);
- /*
- Set the NB_CFG MSR register. Enable CF8 extended configuration cycles.
- */
- LibAmdMsrRead (0xC001001F, &MsrReg, &StdHeader);
- MsrReg = MsrReg | 0x0000400000000000;
- LibAmdMsrWrite (0xC001001F, &MsrReg, &StdHeader);
-
/* For serial port */
PciData = 0xFF03FFD5;
PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0x14, 0x3, 0x44);