summaryrefslogtreecommitdiff
path: root/src/cpu/amd/pi/00660F01
diff options
context:
space:
mode:
Diffstat (limited to 'src/cpu/amd/pi/00660F01')
-rw-r--r--src/cpu/amd/pi/00660F01/fixme.c4
-rw-r--r--src/cpu/amd/pi/00660F01/model_15_init.c8
2 files changed, 6 insertions, 6 deletions
diff --git a/src/cpu/amd/pi/00660F01/fixme.c b/src/cpu/amd/pi/00660F01/fixme.c
index a4c574ced7..0bad4679ce 100644
--- a/src/cpu/amd/pi/00660F01/fixme.c
+++ b/src/cpu/amd/pi/00660F01/fixme.c
@@ -14,8 +14,8 @@
*/
#include <cpu/x86/mtrr.h>
+#include <cpu/amd/msr.h>
#include <northbridge/amd/agesa/agesa_helper.h>
-
#include <Porting.h>
#include <AGESA.h>
#include <amdlib.h>
@@ -80,7 +80,7 @@ void amd_initmmio(void)
*/
MsrReg = CONFIG_MMCONF_BASE_ADDRESS |
(LibAmdBitScanReverse(CONFIG_MMCONF_BUS_NUMBER) << 2) | 1;
- LibAmdMsrWrite(0xC0010058, &MsrReg, &StdHeader);
+ LibAmdMsrWrite(MMIO_CONF_BASE, &MsrReg, &StdHeader);
/* For serial port */
PciData = 0xFF03FFD5;
diff --git a/src/cpu/amd/pi/00660F01/model_15_init.c b/src/cpu/amd/pi/00660F01/model_15_init.c
index 424a6c06ff..3f3a1fda44 100644
--- a/src/cpu/amd/pi/00660F01/model_15_init.c
+++ b/src/cpu/amd/pi/00660F01/model_15_init.c
@@ -15,6 +15,8 @@
#include <console/console.h>
#include <cpu/x86/msr.h>
+#include <cpu/amd/msr.h>
+#include <cpu/x86/mtrr.h>
#include <cpu/amd/mtrr.h>
#include <device/device.h>
#include <device/pci.h>
@@ -24,8 +26,6 @@
#include <cpu/x86/lapic.h>
#include <cpu/cpu.h>
#include <cpu/x86/cache.h>
-#include <cpu/x86/mtrr.h>
-#include <cpu/amd/amdfam15.h>
#include <arch/acpi.h>
#include <amdlib.h>
@@ -82,12 +82,12 @@ static void model_15_init(struct device *dev)
x86_enable_cache();
/* zero the machine check error status registers */
- msr = rdmsr(MCG_CAP);
+ msr = rdmsr(IA32_MCG_CAP);
num_banks = msr.lo & MCA_BANKS_MASK;
msr.lo = 0;
msr.hi = 0;
for (i = 0; i < num_banks; i++)
- wrmsr(MC0_STATUS + (i * 4), msr);
+ wrmsr(IA32_MC0_STATUS + (i * 4), msr);
/* Enable the local CPU APICs */
setup_lapic();