4 files changed, 2 insertions, 17 deletions
diff --git a/src/cpu/amd/model_10xxx/model_10xxx_init.c b/src/cpu/amd/model_10xxx/model_10xxx_init.c
index 7fc3e277ab..9cd6d66e4a 100644
--- a/src/cpu/amd/model_10xxx/model_10xxx_init.c
+++ b/src/cpu/amd/model_10xxx/model_10xxx_init.c
@@ -27,9 +27,7 @@
 #include <cpu/x86/pae.h>
 #include <pc80/mc146818rtc.h>
 #include <cpu/x86/lapic.h>
-
 #include "northbridge/amd/amdfam10/amdfam10.h"
-
 #include <cpu/amd/model_10xxx_rev.h>
 #include <cpu/cpu.h>
 #include <cpu/x86/cache.h>
diff --git a/src/cpu/amd/model_fxx/model_fxx_init.c b/src/cpu/amd/model_fxx/model_fxx_init.c
index 460cbf40d4..865198a52a 100644
--- a/src/cpu/amd/model_fxx/model_fxx_init.c
+++ b/src/cpu/amd/model_fxx/model_fxx_init.c
@@ -7,6 +7,7 @@
  * Copyright 2005 AMD
  * 2005.08 yhlu add microcode support
  */
+
 #include <console/console.h>
 #include <cpu/x86/msr.h>
 #include <cpu/amd/mtrr.h>
@@ -17,17 +18,13 @@
 #include <cpu/x86/pae.h>
 #include <pc80/mc146818rtc.h>
 #include <cpu/x86/lapic.h>
-
 #include "northbridge/amd/amdk8/amdk8.h"
-
 #include <cpu/amd/model_fxx_rev.h>
 #include <cpu/amd/microcode.h>
 #include <cpu/cpu.h>
 #include <cpu/x86/cache.h>
 #include <cpu/x86/mtrr.h>
-
 #include <cpu/amd/multicore.h>
-
 #include <cpu/amd/model_fxx_msr.h>
 
 #if CONFIG_WAIT_BEFORE_CPUS_INIT
@@ -110,6 +107,7 @@ struct mtrr {
 	msr_t base;
 	msr_t mask;
 };
+
 struct mtrr_state {
 	struct mtrr mtrrs[MTRR_COUNT];
 	msr_t top_mem, top_mem2;
diff --git a/src/cpu/amd/model_fxx/model_fxx_update_microcode.c b/src/cpu/amd/model_fxx/model_fxx_update_microcode.c
index 85a652fc00..5cc0fba476 100644
--- a/src/cpu/amd/model_fxx/model_fxx_update_microcode.c
+++ b/src/cpu/amd/model_fxx/model_fxx_update_microcode.c
@@ -19,16 +19,10 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-/*
- * Description: Microcode patch support for k8 by yhlu
- */
-
-
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <string.h>
-
 #include <cpu/amd/microcode.h>
 
 static uint8_t microcode_updates[] __attribute__ ((aligned(16))) = {
@@ -80,7 +74,6 @@ static unsigned get_equivalent_processor_rev_id(unsigned orig_id) {
 
 	};
 
-
 	unsigned new_id;
 	int i;
 
@@ -94,7 +87,6 @@ static unsigned get_equivalent_processor_rev_id(unsigned orig_id) {
 	}
 
 	return new_id;
-
 }
 
 void model_fxx_update_microcode(unsigned cpu_deviceid)
@@ -105,6 +97,4 @@ void model_fxx_update_microcode(unsigned cpu_deviceid)
 	equivalent_processor_rev_id = get_equivalent_processor_rev_id(cpu_deviceid );
 	if(equivalent_processor_rev_id != 0)
 	        amd_update_microcode(microcode_updates, equivalent_processor_rev_id);
-
 }
-
diff --git a/src/cpu/amd/model_gx2/model_gx2_init.c b/src/cpu/amd/model_gx2/model_gx2_init.c
index 435e89aa81..241c0f979f 100644
--- a/src/cpu/amd/model_gx2/model_gx2_init.c
+++ b/src/cpu/amd/model_gx2/model_gx2_init.c
@@ -6,7 +6,6 @@
 #include <cpu/x86/lapic.h>
 #include <cpu/x86/cache.h>
 
-
 static void vsm_end_post_smi(void)
 {
 	__asm__ volatile (