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Diffstat (limited to 'src/cpu/intel/car')
-rw-r--r--src/cpu/intel/car/cache_as_ram.inc5
-rw-r--r--src/cpu/intel/car/cache_as_ram_ht.inc5
2 files changed, 0 insertions, 10 deletions
diff --git a/src/cpu/intel/car/cache_as_ram.inc b/src/cpu/intel/car/cache_as_ram.inc
index 781e48017b..1ea50b8b37 100644
--- a/src/cpu/intel/car/cache_as_ram.inc
+++ b/src/cpu/intel/car/cache_as_ram.inc
@@ -357,17 +357,12 @@ lout:
andl $(~(CR0_CacheDisable | CR0_NoWriteThrough)), %eax
movl %eax, %cr0
- /* Clear boot_complete flag. */
- xorl %ebp, %ebp
__main:
post_code(POST_PREPARE_RAMSTAGE)
cld /* Clear direction flag. */
- movl %ebp, %esi
-
movl $ROMSTAGE_STACK, %esp
movl %esp, %ebp
- pushl %esi
call copy_and_run
.Lhlt:
diff --git a/src/cpu/intel/car/cache_as_ram_ht.inc b/src/cpu/intel/car/cache_as_ram_ht.inc
index 9ef69adfcb..8a845e954a 100644
--- a/src/cpu/intel/car/cache_as_ram_ht.inc
+++ b/src/cpu/intel/car/cache_as_ram_ht.inc
@@ -431,17 +431,12 @@ no_msr_11e:
post_code(0x3c)
- /* Clear boot_complete flag. */
- xorl %ebp, %ebp
__main:
post_code(POST_PREPARE_RAMSTAGE)
cld /* Clear direction flag. */
- movl %ebp, %esi
-
movl $ROMSTAGE_STACK, %esp
movl %esp, %ebp
- pushl %esi
call copy_and_run
.Lhlt: