summaryrefslogtreecommitdiff
path: root/src/cpu/intel/haswell/bootblock.c
diff options
context:
space:
mode:
Diffstat (limited to 'src/cpu/intel/haswell/bootblock.c')
-rw-r--r--src/cpu/intel/haswell/bootblock.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/intel/haswell/bootblock.c b/src/cpu/intel/haswell/bootblock.c
index 3a306b5729..722cc0102e 100644
--- a/src/cpu/intel/haswell/bootblock.c
+++ b/src/cpu/intel/haswell/bootblock.c
@@ -23,7 +23,7 @@
#include <cpu/intel/microcode/microcode.c>
#include "haswell.h"
-#if IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT)
+#if CONFIG(SOUTHBRIDGE_INTEL_LYNXPOINT)
/* Needed for RCBA access to set Soft Reset Data register */
#include <southbridge/intel/lynxpoint/pch.h>
#else