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-rw-r--r--src/cpu/intel/haswell/Kconfig3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/cpu/intel/haswell/Kconfig b/src/cpu/intel/haswell/Kconfig
index 9076b88015..423966c2d4 100644
--- a/src/cpu/intel/haswell/Kconfig
+++ b/src/cpu/intel/haswell/Kconfig
@@ -18,8 +18,6 @@ config CPU_SPECIFIC_OPTIONS
select UDELAY_TSC
select TSC_CONSTANT_RATE
select SMM_TSEG
- select RELOCATABLE_MODULES
- select RELOCATABLE_RAMSTAGE
select SUPPORT_CPU_UCODE_IN_CBFS
#select AP_IN_SIPI_WAIT
select TSC_SYNC_MFENCE
@@ -46,7 +44,6 @@ config SMM_RESERVED_SIZE
config RESET_ON_INVALID_RAMSTAGE_CACHE
bool "Reset the system on S3 wake when ramstage cache invalid."
default n
- depends on RELOCATABLE_RAMSTAGE
help
The haswell romstage code caches the loaded ramstage program
in SMM space. On S3 wake the romstage will copy over a fresh